Datasheet Texas Instruments SN74ALVCH162374 — Ficha de datos
Fabricante | Texas Instruments |
Serie | SN74ALVCH162374 |
Flip-Flop tipo D activado por borde de 16 bits con salidas de 3 estados
Hojas de datos
SN74ALVCH162374 datasheet
PDF, 320 Kb, Revisión: F, Archivo publicado: sept 1, 2004
Extracto del documento
Precios
Estado
SN74ALVCH162374DGGR | SN74ALVCH162374DL | SN74ALVCH162374DLR | SN74ALVCH162374GR | |
---|---|---|---|---|
Estado del ciclo de vida | Obsoleto (El fabricante ha interrumpido la producción del dispositivo) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | No | No | No | No |
Embalaje
SN74ALVCH162374DGGR | SN74ALVCH162374DL | SN74ALVCH162374DLR | SN74ALVCH162374GR | |
---|---|---|---|---|
N | 1 | 2 | 3 | 4 |
Pin | 48 | 48 | 48 | 48 |
Package Type | DGG | DL | DL | DGG |
Industry STD Term | TSSOP | SSOP | SSOP | TSSOP |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Width (mm) | 6.1 | 7.49 | 7.49 | 6.1 |
Length (mm) | 12.5 | 15.88 | 15.88 | 12.5 |
Thickness (mm) | 1.15 | 2.59 | 2.59 | 1.15 |
Pitch (mm) | .5 | .635 | .635 | .5 |
Max Height (mm) | 1.2 | 2.79 | 2.79 | 1.2 |
Mechanical Data | Descargar | Descargar | Descargar | Descargar |
Package QTY | 25 | 1000 | 2000 | |
Carrier | TUBE | LARGE T&R | LARGE T&R | |
Device Marking | ALVCH162374 | ALVCH162374 | ALVCH162374 |
Paramétricos
Parameters / Models | SN74ALVCH162374DGGR | SN74ALVCH162374DL | SN74ALVCH162374DLR | SN74ALVCH162374GR |
---|---|---|---|---|
3-State Output | Yes | Yes | Yes | Yes |
Approx. Price (US$) | 0.65 | 1ku | |||
Bits | 16 | 16 | 16 | |
Bits(#) | 16 | |||
F @ Nom Voltage(Max), Mhz | 150 | 150 | 150 | |
F @ Nom Voltage(Max)(Mhz) | 150 | |||
ICC @ Nom Voltage(Max), mA | 0.04 | 0.04 | 0.04 | |
ICC @ Nom Voltage(Max)(mA) | 0.04 | |||
Input Type | LVTTL CMOS | |||
Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | |
Operating Temperature Range(C) | -40 to 85 | |||
Output Drive (IOL/IOH)(Max), mA | 12/-12 | 12/-12 | 12/-12 | |
Output Drive (IOL/IOH)(Max)(mA) | 12/-12 | |||
Output Type | LVTTL CMOS | |||
Package Group | TSSOP | SSOP | SSOP | TSSOP |
Package Size: mm2:W x L, PKG | 48SSOP: 164 mm2: 10.35 x 15.88(SSOP) | 48SSOP: 164 mm2: 10.35 x 15.88(SSOP) | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) | |
Package Size: mm2:W x L (PKG) | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) | |||
Rating | Catalog | Catalog | Catalog | Catalog |
Schmitt Trigger | No | No | No | No |
Technology Family | ALVC | ALVC | ALVC | ALVC |
VCC(Max), V | 3.6 | 3.6 | 3.6 | |
VCC(Max)(V) | 3.6 | |||
VCC(Min), V | 1.65 | 1.65 | 1.65 | |
VCC(Min)(V) | 1.65 | |||
Voltage(Nom), V | 1.8,2.5,2.7,3.3 | 1.8,2.5,2.7,3.3 | 1.8,2.5,2.7,3.3 | |
Voltage(Nom)(V) | 1.8 2.5 2.7 3.3 | |||
tpd @ Nom Voltage(Max), ns | 5.4,4.6 | 5.4,4.6 | 5.4,4.6 | |
tpd @ Nom Voltage(Max)(ns) | 5.4 4.6 |
Plan ecológico
SN74ALVCH162374DGGR | SN74ALVCH162374DL | SN74ALVCH162374DLR | SN74ALVCH162374GR | |
---|---|---|---|---|
RoHS | Desobediente | Obediente | Obediente | Obediente |
Pb gratis | No |
Notas de aplicación
- TI SN74ALVC16835 Component Specification Analysis for PC100PDF, 43 Kb, Archivo publicado: agosto 3, 1998
The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T - Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)PDF, 96 Kb, Revisión: A, Archivo publicado: mayo 13, 1998
Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large - Bus-Hold CircuitPDF, 418 Kb, Archivo publicado: feb 5, 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of - 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa - Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)PDF, 154 Kb, Revisión: A, Archivo publicado: sept 8, 1999
In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
Linea modelo
Serie: SN74ALVCH162374 (4)
Clasificación del fabricante
- Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop