Datasheet Texas Instruments SN74AVC16722 — Ficha de datos
Fabricante | Texas Instruments |
Serie | SN74AVC16722 |
Flip-Flop de 22 bits con salidas de 3 estados
Hojas de datos
22-Bit Flip-Flop With 3-State Outputs datasheet
PDF, 375 Kb, Revisión: H, Archivo publicado: jun 29, 2000
Extracto del documento
Precios
Estado
74AVC16722DGGRE4 | SN74AVC16722DGGR | |
---|---|---|
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | Sí | Sí |
Embalaje
74AVC16722DGGRE4 | SN74AVC16722DGGR | |
---|---|---|
N | 1 | 2 |
Pin | 64 | 64 |
Package Type | DGG | DGG |
Industry STD Term | TSSOP | TSSOP |
JEDEC Code | R-PDSO-G | R-PDSO-G |
Package QTY | 2000 | 2000 |
Carrier | LARGE T&R | LARGE T&R |
Device Marking | AVC16722 | AVC16722 |
Width (mm) | 6.1 | 6.1 |
Length (mm) | 17 | 17 |
Thickness (mm) | 1.15 | 1.15 |
Pitch (mm) | .5 | .5 |
Max Height (mm) | 1.2 | 1.2 |
Mechanical Data | Descargar | Descargar |
Paramétricos
Parameters / Models | 74AVC16722DGGRE4 | SN74AVC16722DGGR |
---|---|---|
3-State Output | Yes | Yes |
Bits | 22 | 22 |
F @ Nom Voltage(Max), Mhz | 200 | 200 |
ICC @ Nom Voltage(Max), mA | 0.04 | 0.04 |
Operating Temperature Range, C | -40 to 85 | -40 to 85 |
Output Drive (IOL/IOH)(Max), mA | 12/-12 | 12/-12 |
Package Group | TSSOP | TSSOP |
Package Size: mm2:W x L, PKG | 64TSSOP: 138 mm2: 8.1 x 17(TSSOP) | 64TSSOP: 138 mm2: 8.1 x 17(TSSOP) |
Rating | Catalog | Catalog |
Schmitt Trigger | No | No |
Technology Family | AVC | AVC |
VCC(Max), V | 3.6 | 3.6 |
VCC(Min), V | 1.2 | 1.2 |
Voltage(Nom), V | 1.2,1.5,1.8,2.5,3.3 | 1.2,1.5,1.8,2.5,3.3 |
tpd @ Nom Voltage(Max), ns | 7.7,6.3,5.4,3.3,2.6 | 7.7,6.3,5.4,3.3,2.6 |
Plan ecológico
74AVC16722DGGRE4 | SN74AVC16722DGGR | |
---|---|---|
RoHS | Obediente | Obediente |
Notas de aplicación
- Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)PDF, 126 Kb, Revisión: B, Archivo publicado: jul 7, 1999
Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i - AVC Logic Family Technology and Applications (Rev. A)PDF, 148 Kb, Revisión: A, Archivo publicado: agosto 26, 1998
Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control ( - Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)PDF, 390 Kb, Revisión: B, Archivo publicado: abr 30, 2015
- 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa - Selecting the Right Level Translation Solution (Rev. A)PDF, 313 Kb, Revisión: A, Archivo publicado: jun 22, 2004
Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
Linea modelo
Serie: SN74AVC16722 (2)
Clasificación del fabricante
- Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop