Datasheet Texas Instruments SN74AVCBH164245 — Ficha de datos

FabricanteTexas Instruments
SerieSN74AVCBH164245
Datasheet Texas Instruments SN74AVCBH164245

Bus Xcvr de suministro dual de 16 bits con configuración. Tensión Xlation y salidas de 3 estados

Hojas de datos

16-Bit Dual-Supply Bus Transceiver datasheet
PDF, 895 Kb, Revisión: B, Archivo publicado: marzo 28, 2008
Extracto del documento

Precios

Estado

74AVCBH164245GRE474AVCBH164245GRG474AVCBH164245ZQLRSN74AVCBH164245GRSN74AVCBH164245KRSN74AVCBH164245VR
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

74AVCBH164245GRE474AVCBH164245GRG474AVCBH164245ZQLRSN74AVCBH164245GRSN74AVCBH164245KRSN74AVCBH164245VR
N123456
Pin484856485648
Package TypeDGGDGGZQLDGGGQLDGV
Industry STD TermTSSOPTSSOPBGA MICROSTAR JUNIORTSSOPBGA MICROSTAR JUNIORTVSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PBGA-NR-PDSO-GR-PBGA-NR-PDSO-G
Package QTY20002000100020002000
CarrierLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingAVCBH164245AVCBH164245WBH4245AVCBH164245WBH4245WBH4245
Width (mm)6.16.14.56.14.54.4
Length (mm)12.512.5712.579.7
Thickness (mm)1.151.15.751.15.751.05
Pitch (mm).5.5.65.5.65.4
Max Height (mm)1.21.211.211.2
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / Models74AVCBH164245GRE4
74AVCBH164245GRE4
74AVCBH164245GRG4
74AVCBH164245GRG4
74AVCBH164245ZQLR
74AVCBH164245ZQLR
SN74AVCBH164245GR
SN74AVCBH164245GR
SN74AVCBH164245KR
SN74AVCBH164245KR
SN74AVCBH164245VR
SN74AVCBH164245VR
Approx. Price (US$)1.86 | 1ku
Bits1616161616
Bits(#)16
ICCA Static Current, mA0.040.040.040.040.04
ICCA Static Current(mA)0.04
ICCB Static Current, mA0.040.040.040.040.04
ICCB Static Current(mA)0.04
Operating Temperature Range(C)-40 to 85
Package GroupTSSOPTSSOPBGA MICROSTAR JUNIORTSSOPBGA MICROSTAR JUNIORTVSOP
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)
Package Size: mm2:W x L (PKG)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Special FeaturesIOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF,Dual Supply,TranslationIOFF,Dual Supply,Translation
Static Current, mA0.080.080.080.080.08
VCCA(Max), V3.33.33.33.33.3
VCCA(Max)(V)3.3
VCCA(Min), V2.52.52.52.52.5
VCCA(Min)(V)2.5
VCCB(Max), V55555
VCCB(Max)(V)5
VCCB(Min), V3.33.33.33.33.3
VCCB(Min)(V)3.3

Plan ecológico

74AVCBH164245GRE474AVCBH164245GRG474AVCBH164245ZQLRSN74AVCBH164245GRSN74AVCBH164245KRSN74AVCBH164245VR
RoHSObedienteObedienteObedienteObedienteDesobedienteObediente
Pb gratisNo

Notas de aplicación

  • Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)
    PDF, 126 Kb, Revisión: B, Archivo publicado: jul 7, 1999
    Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i
  • AVC Logic Family Technology and Applications (Rev. A)
    PDF, 148 Kb, Revisión: A, Archivo publicado: agosto 26, 1998
    Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control (
  • Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)
    PDF, 390 Kb, Revisión: B, Archivo publicado: abr 30, 2015
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, Revisión: A, Archivo publicado: jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Voltage Level Translation> Application Specific Voltage Translation