Datasheet Texas Instruments SN74AVCH16T245 — Ficha de datos

FabricanteTexas Instruments
SerieSN74AVCH16T245
Datasheet Texas Instruments SN74AVCH16T245

Transceptor de bus de suministro dual de 16 bits con traducción de voltaje configurable y salidas de 3 estados

Hojas de datos

SN74AVCH16T245 16-Bit Dual-Supply Bus Transceiver with Configurable Level-Shifting / Voltage Translation and Tri-State Outputs datasheet
PDF, 1.3 Mb, Revisión: D, Archivo publicado: nov 5, 2015
Extracto del documento

Precios

Estado

74AVCH16T245ZQLRSN74AVCH16T245GQLRSN74AVCH16T245GRSN74AVCH16T245VR
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

74AVCH16T245ZQLRSN74AVCH16T245GQLRSN74AVCH16T245GRSN74AVCH16T245VR
N1234
Pin56564848
Package TypeZQLGQLDGGDGV
Industry STD TermBGA MICROSTAR JUNIORBGA MICROSTAR JUNIORTSSOPTVSOP
JEDEC CodeR-PBGA-NR-PBGA-NR-PDSO-GR-PDSO-G
Package QTY100020002000
CarrierLARGE T&RLARGE T&RLARGE T&R
Device MarkingWJ245WJ245AVCH16T245WJ245
Width (mm)4.54.56.14.4
Length (mm)7712.59.7
Thickness (mm).75.751.151.05
Pitch (mm).65.65.5.4
Max Height (mm)111.21.2
Mechanical DataDescargarDescargarDescargarDescargar

Paramétricos

Parameters / Models74AVCH16T245ZQLR
74AVCH16T245ZQLR
SN74AVCH16T245GQLR
SN74AVCH16T245GQLR
SN74AVCH16T245GR
SN74AVCH16T245GR
SN74AVCH16T245VR
SN74AVCH16T245VR
Approx. Price (US$)1.50 | 1ku
Bits161616
Bits(#)16
F @ Nom Voltage(Max), Mhz100100100
F @ Nom Voltage(Max)(Mhz)100
ICC @ Nom Voltage(Max), mA0.0450.0450.045
ICC @ Nom Voltage(Max)(mA)0.045
Input TypeCMOS
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output TypeCMOS
Package GroupBGA MICROSTAR JUNIORBGA MICROSTAR JUNIORTSSOPTVSOP
Package Size: mm2:W x L, PKG56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)
Package Size: mm2:W x L (PKG)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
RatingCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNo
Technology FamilyAVCAVCAVCAVC
VCC(Max), V3.63.63.6
VCC(Max)(V)3.6
VCC(Min), V1.21.21.2
VCC(Min)(V)1.2
Voltage(Nom), V1.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.31.2,1.5,1.8,2.5,3.3
Voltage(Nom)(V)1.2
1.5
1.8
2.5
3.3
tpd @ Nom Voltage(Max), ns4.1,3.6,3.4,3.24.1,3.6,3.4,3.24.1,3.6,3.4,3.2
tpd @ Nom Voltage(Max)(ns)4.1
3.6
3.4
3.2

Plan ecológico

74AVCH16T245ZQLRSN74AVCH16T245GQLRSN74AVCH16T245GRSN74AVCH16T245VR
RoHSObedienteDesobedienteObedienteObediente
Pb gratisNo

Notas de aplicación

  • Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)
    PDF, 126 Kb, Revisión: B, Archivo publicado: jul 7, 1999
    Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i
  • AVC Logic Family Technology and Applications (Rev. A)
    PDF, 148 Kb, Revisión: A, Archivo publicado: agosto 26, 1998
    Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control (
  • Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)
    PDF, 390 Kb, Revisión: B, Archivo publicado: abr 30, 2015
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, Revisión: A, Archivo publicado: jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Voltage Level Translation> Direction Controlled Voltage Translation