Datasheet Texas Instruments TB5R2DW — Ficha de datos

TB5R1, TB5R2
www.ti.com SLLS588C – NOVEMBER 2003 – REVISED JANUARY 2008 QUAD DIFFERENTIAL PECL RECEIVERS
FEATURES 1 Functional Replacements for the Agere
BRF1A, BRF2A, BRS2A, and BRS2B
Pin Equivalent to General Trade 26LS32
High Input Impedance Approximately 8 kΩ
4-ns Maximum Propagation Delay
TB5R1 Provides 50-mV Hysteresis
TB5R2 With -125-mV Threshold Offset for
Preferred State Output
-1.1-V to 7.1-V Common Mode Range
Single 5-V 10% Supply
Slew Rate Limited (1 ns min 80% to 20%)
TB5R2 Output Defaults to Logic 1 When Inputs
Left Open or Shorted to VCC or GND
ESD Protection HBM > 3 kV, CDM > 2 kV
Operating Temperature Range: -40C to 85C
Available in Gull-Wing SOIC (JEDEC MS-013,
DW) and SOIC (D) Package APPLICATIONS Digital Data or Clock Transmission Over
Balanced Lines DESCRIPTION
These quad differential receivers accept digital data
over balanced transmission lines. They translate
differential input logic levels to TTL output logic …