Datasheet Texas Instruments TLV1548-EP — Ficha de datos

FabricanteTexas Instruments
SerieTLV1548-EP
Datasheet Texas Instruments TLV1548-EP

Producto mejorado de bajo voltaje de 10 bits Adc con control en serie y 8 entradas analógicas

Hojas de datos

Low-Voltage 10-Bit Analog-to-Digital Converter w/Serial Control & 8 Analog Input datasheet
PDF, 686 Kb, Revisión: A, Archivo publicado: dic 5, 2003
Extracto del documento

Precios

Estado

TLV1548QDBREPV62/04618-01XE
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

TLV1548QDBREPV62/04618-01XE
N12
Pin2020
Package TypeDBDB
Industry STD TermSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY20002000
CarrierLARGE T&RLARGE T&R
Device Marking1548QE1548QE
Width (mm)5.35.3
Length (mm)7.27.2
Thickness (mm)1.951.95
Pitch (mm).65.65
Max Height (mm)22
Mechanical DataDescargarDescargar

Paramétricos

Parameters / ModelsTLV1548QDBREP
TLV1548QDBREP
V62/04618-01XE
V62/04618-01XE
# Input Channels88
Analog Voltage AVDD(Max), V5.55.5
Analog Voltage AVDD(Min), V2.72.7
ArchitectureSARSAR
Digital Supply(Max), V5.55.5
Digital Supply(Min), V2.72.7
INL(Max), +/-LSB11
InterfaceSPISPI
Operating Temperature Range, C-40 to 125-40 to 125
Package GroupSSOPSSOP
Package Size: mm2:W x L, PKG20SSOP: 56 mm2: 7.8 x 7.2(SSOP)20SSOP: 56 mm2: 7.8 x 7.2(SSOP)
Power Consumption(Typ), mW1.051.05
RatingHiRel Enhanced ProductHiRel Enhanced Product
Reference ModeExtExt
Resolution, Bits1010
Sample Rate (max), SPS85kSPS85kSPS

Plan ecológico

TLV1548QDBREPV62/04618-01XE
RoHSObedienteObediente

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Serie: TLV1548-EP (2)

Clasificación del fabricante

  • Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters