Datasheet Linear Technology LTC3413 — Ficha de datos

FabricanteLinear Technology
SerieLTC3413

Regulador síncrono monolítico 3A, 2MHz para terminación de memoria DDR / QDR

Hojas de datos

LTC3413 - 3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination
PDF, 260 Kb, Revisión: C, Archivo subido: sept 21, 2017
Extracto del documento

Precios

Embalaje

LTC3413EFE#PBFLTC3413EFE#TRPBFLTC3413IFE#PBFLTC3413IFE#TRPBF
N1234
PackageTSSOP-16
Dibujo del esquema del paquete
TSSOP-16
Dibujo del esquema del paquete
TSSOP-16
Dibujo del esquema del paquete
TSSOP-16
Dibujo del esquema del paquete
Package CodeFEFEFEFE
Package Index05-08-1663 (BA)05-08-1663 (BA)05-08-1663 (BA)05-08-1663 (BA)
Pin Count16161616

Paramétricos

Parameters / ModelsLTC3413EFE#PBFLTC3413EFE#TRPBFLTC3413IFE#PBFLTC3413IFE#TRPBF
ArchitectureConstant Frequency Current ModeConstant Frequency Current ModeConstant Frequency Current ModeConstant Frequency Current Mode
Demo BoardsDC492ADC492ADC492ADC492A
Design ToolsLTspice Model,LTpowerCAD ModelLTspice Model,LTpowerCAD ModelLTspice Model,LTpowerCAD ModelLTspice Model,LTpowerCAD Model
Export Controlnononono
FeaturesResistor Set Frequency, Power Good, DDR ModeResistor Set Frequency, Power Good, DDR ModeResistor Set Frequency, Power Good, DDR ModeResistor Set Frequency, Power Good, DDR Mode
Frequency, kHz2000200020002000
Frequency Adjust RangeUp to 2MHzUp to 2MHzUp to 2MHzUp to 2MHz
Integrated Inductornononono
Ishutdown, µA0.020.020.020.02
Isupply, mA0.250.250.250.25
Monolithicyesyesyesyes
Number of Outputs1111
Operating Temperature Range, °C0 to 850 to 85-40 to 85-40 to 85
Output Current, A3333
Polyphasenononono
Switch Current, A5.45.45.45.4
Synchronousyesyesyesyes
TopologyBuckBuckBuckBuck
Vin Max, V5.55.55.55.5
Vin Min, V2.52.52.52.5
Vout Max, V5.55.55.55.5
Vout MaximumVREF/2VREF/2VREF/2VREF/2
Vout Min, V0.70.70.70.7

Plan ecológico

LTC3413EFE#PBFLTC3413EFE#TRPBFLTC3413IFE#PBFLTC3413IFE#TRPBF
RoHSObedienteObedienteObedienteObediente

Notas de Diseño

  • High Performance Switch Mode Power Solutions for Altera Low Voltage FPGAs &mdash Design Solutions 43
    PDF, 158 Kb, Archivo publicado: jun 1, 2004
    Extracto del documento
  • 3A, 2MHz Monolithic Synchronous Step-Down Regulator Provides a Compact Solution for DDR Memory Termination &mdash DN309
    PDF, 75 Kb, Archivo publicado: abr 3, 2003
    Extracto del documento

Linea modelo

Clasificación del fabricante

  • Power Management > Switching Regulator > DDR Memory/Bus Termination