Datasheet Linear Technology LTC3718EG#TRPBF — Ficha de datos

Fabricante	Linear Technology
Serie	LTC3718
Numero de parte	LTC3718EG#TRPBF

Bajo voltaje de entrada, controlador DC / DC para terminación de memoria DDR / QDR

Hojas de datos

PDF, 254 Kb, Revisión: A, Archivo subido: sept 22, 2017

Extracto del documento

Embalaje

Package	SSOP-24
Package Code	G
Package Index	05-08-1640 (G24)

Paramétricos

Demo Boards	DC464A
Design Tools	LTspice Model
Export Control	no
Features	DDR Mode, Resistor Set Frequency, Power Good
Frequency	1500 kHz
Integrated Inductor	no
Ishutdown	15 µA
Isupply	1 mA
Monolithic	no
Number of Outputs	1
Operating Temperature Range	0 to 85 °C
Output Current	20 A
Polyphase	no
Switch Current	20 A
Synchronous	yes
Topology	Buck
Vin Max	36 V
Vin Min	1.5 V
Vout Max	36 V
Vout Maximum	VREF/2
Vout Min	0.7 V

Plan ecológico

RoHS

Obediente

Notas de Diseño

Descargar
Wide Input Range, High Efficiency DDR Termination Power Supply Achieves Fast Transient Response &mdash DN281
PDF, 84 Kb, Archivo publicado: abr 1, 2002
Extracto del documento
advertisement Wide Input Range, High Efficiency DDR Termination Power
Supply Achieves Fast Transient Response вЂ“ Design Note 281
Wei Chen
Introduction
TodayвЂ™s complicated computing and communication
systems demand high system memory bandwidths. The
emerging standard is Double Data Rate (DDR) memory
because of its higher data rate and relatively low cost.
A typical DDR memory system needs at least two main
power supplies: VDD for the I/O power and V TT for the
termination power. To ensure good signal quality and
fast data rate, the termination power supply (V TT ) must
always track the VDD with V TT = VDD/2. V TT can be as
low as 0.6V. Since the termination resistors can carry
current in either direction, the V TT power supply must
be able to both source and sink current while tracking
the VDD supply. A family of new termination/tracking
controllers, including the LTC В®3717, LTC3718 and
LTC3831, satisfy these DDR requirements. on-time programmed by the input voltage and output
voltage. This scheme allows a fairly constant switching
frequency while achieving an extremely fast load transient response. In addition, the controllerвЂ™s minimum
on-time is less than 100ns, allowing for a very small
duty cycle at a very high switching frequency, thus …

Artículos

Descargar
High Efficiency DDR Termination Power Supplies Source and Sink More than 10 Amps &mdash LT Journal
PDF, 205 Kb, Archivo publicado: marzo 1, 2002
Extracto del documento
DESIGN FEATURES High Efficiency DDR Termination
Power Supplies Source and Sink
More than 10 Amps
by Wei Chen
Introduction
The emerging standard for system
memory in computing and communication systems is Double Data Rate
(DDR) memory. Typical DDR memory
needs at least two main power supplies: VDD and VTT, where VDD powers
the I/O, and VTT powers the I/O termination. To ensure good signal
quality and fast data rate, the termination power supply VTT must always
track the VDD supply with VTT = VDD/
2. Since the termination resistors can
carry current in either direction, the
VTT power supply must be able to
both source and sink current while
tracking the VDD supply. A typical
DDR termination power supply for a
PC application requires 2A to 10A of
current. In servers, high power workstations or broadband networking
equipment applications, the DDR termination supply current may well
exceed 10A. At these current levels, a
linear regulator is not a viable solu-VDD …

Linea modelo

Serie: LTC3718 (2)

LTC3718EG#PBF LTC3718EG#TRPBF

Clasificación del fabricante

Power Management > Switching Regulator > DDR Memory/Bus Termination

Otros nombres:

LTC3718EGTRPBF, LTC3718EG TRPBF

Contactos