Datasheet Microchip ATSAME51J19A-MU — Ficha de datos

SAM D5x/E5x Family
32-bit ARMВ® CortexВ®-M4F MCUs with 1 Msps 12-bit ADC,
QSPI, USB, Ethernet, and PTC
Features
Operating Conditions:1.71V – 3.6V, -40°C to +85°C, DC to 120 MHz
Core: 120 MHz ARMВ® CortexВ®-M4 403 CoreMarkВ® at 120 MHz 4 KB combined Instruction cache and Data cache 8-zones Memory Protection Unit (MPU) ThumbВ®-2 instruction set Embedded Trace Module (ETM) with instruction trace stream Core Sight Embedded Trace Buffer (ETB) Trace Port Interface Unit (TPIU) Floating Point Unit (FPU)
Memories 1 MB/512 KB/256 KB in-system self-programmable Flash with:
– Error Correction Code (ECC)
– Dual bank with Read-While-Write (RWW) support
– EEPROM hardware emulation 256/192/128 KB SRAM Main Memory
– 128/96/64 KB of Error Correction Code (ECC) RAM option Up to 4 KB of Tightly Coupled Memory (TCM) Up to 8 KB additional SRAM
– Can be retained in backup mode Eight 32-bit backup registers
System Power-on Reset (POR) and Brown-out detection (BOD) Internal and external clock options
External Interrupt Controller (EIC)
16 external interrupts
One non-maskable interrupt
Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface Power Supply Idle, Standby, Hibernate, Backup, and Off Sleep modes SleepWalking peripherals Battery backup support В© 2017 Microchip Technology Inc. Datasheet Advance Information DS60001507A-page 1 SAM D5x/E5x Family Embedded Buck/LDO regulator supporting on-the-fly selection High-Performance Peripherals 32-channel Direct Memory Access Controller (DMAC)
– Built-in CRC, with memory CRC generation/monitor hardware support Up to two SD(HC) Memory Card Interfaces (SDHC)
– Up to 50 MHz operation
– 4-or 1-bit Interface
– Compatibility with SD and SDHC Memory Card Specification Version 3.01 – Compatibility with SDIO Specification Version 3.0
– Compliant with JDEC specification, MMC memory cards V4.51
One Quad I/O Serial Peripheral Interface (QSPI) …