DATASHEET
ACS03MS FN3064
Rev 1.00
January 1996 Radiation Hardened Quad 2-InputNAND Gate with Open Drain Features Pinouts Devices QML Qualified in Accordance with MIL-PRF38535 14 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T14,
LEAD FINISH C
TOP VIEW Detailed Electrical and Screening Requirements are
Contained in SMD# 5962-96703 and Intersil’s QM Plan A1 1 14 VCC B1 2 13 B4 Y1 3 12 A4 A2 4 11 Y4 SEU LET Threshold>100 MEV-cm2/mg B2 5 10 B3 Dose Rate Upset>1011 RAD (Si)/s, 20ns Pulse Y2 6 9 A3 GND 7 8 Y3 1.25 Micron Radiation Hardened SOS CMOS Total Dose >300K RAD (Si) Single Event Upset (SEU) Immunity: 1012 RAD (Si)/s, 20ns Pulse Latch-Up Free Under Any Conditions Military Temperature Range-55oC to +125oC Significant Power Reduction Compared to ALSTTL
Logic 14 PIN CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR CDFP3-F14,
LEAD FINISH C
TOP VIEW DC Operating Voltage Range 4.5V to 5.5V Input Logic Levels
-VIL = 30% of VCC Max
-VIH = 70% of VCC Min Input Current п‚Ј 1пЃA at VOL, VOH Fast Propagation Delay15ns (Max), 10ns (Typ) Description A1 1 14 VCC B1 2 13 B4 Y1 3 12 A4 A2 4 11 Y4 B2 5 10 B3 Y2 6 9 A3 GND 7 8 Y3 The Intersil ACS03MS is a Radiation Hardened quad 2-input
NAND gate with open drain outputs. The open drain output
can drive resistive loads from a separate supply voltage.
The ACS03MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of a
radiation hardened, high-speed, CMOS/SOS Logic Family.
The ACS03MS is supplied in a 14 lead Ceramic Flatpack (K
suffix) or a Ceramic Dual-In-Line Package (D suffix). Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE 5962F9670301VCC -55oC to +125oC MIL-PRF-38535 Class V 14 Lead SBDIP 5962F9670301VXC -55oC to +125oC MIL-PRF-38535 Class V 14 Lead Ceramic Flatpack ACS03D/Sample 25oC Sample 14 Lead SBDIP ACS03K/Sample 25oC Sample 14 Lead Ceramic Flatpack ACS03HMSR 25oC Die Die FN3064 Rev 1.00
January 1996 Page 1 of 3 ACS03MS Functional Diagram An …
