DATASHEET
CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS FN3289
Rev 0.00
November 1994 CMOS NOR Gate Features Pinouts High-Voltage Types (20V Rating) CD4000BMS
TOP VIEW Propagation Delay Time = 60ns (typ.) at CL = 50pF,
VDD = 10V NC 1 14 VDD Buffered Inputs and Outputs NC 2 13 F Standard Symmetrical Output Characteristics A 3 12 E 100% Tested for Maximum Quiescent Current at 20V B 4 11 D C 5 10 K = D + E + F 5V, 10V and 15V Parametric Ratings Maximum Input Current of 1пЃA at 18V Over Full Package-Temperature Range; 100nA at 18V and +25oC Noise Margin (Over Full Package Temperature Range):
-1V at VDD = 5V
-2V at VDD = 10V
-2.5V at VDD = 15V Meets All Requirements of JEDEC Tentative Standards
No. 13B, “Standard Specifications for Description of
“B” Series CMOS Device’s H=A+B+C 6 9 L=G
8 G VSS 7 NC = NO CONNECTION CD4001BMS
TOP VIEW
A 1 14 VDD B 2 13 H J=A+B 3 12 G K=C+D 4 11 M = G + H Description C 5 10 L = E + F CD4000BMS -Dual 3 Plus Inverter D 6 9 F CD4001BMS -Quad 2 Input VSS 7 8 E CD4002BMS -Dual 4 Input CD4025BMS -Triple 3 Input NC = NO CONNECTION CD4002BMS
TOP VIEW CD4000BMS,
CD4001BMS,
CD4002BMS,
and
CD4025BMS NOR gates provide the system designer with
direct implementation of the NOR function and supplement
the existing family of CMOS gates. All inputs and outputs are
buffered.
The CD4000BMS, CD4001BMS, CD4002BMS and the …
