Datasheet Texas Instruments ADS8342IPFBT — Ficha de datos

FabricanteTexas Instruments
SerieADS8342
Numero de parteADS8342IPFBT
Datasheet Texas Instruments ADS8342IPFBT

Salida paralela ADC de 16 bits a 250 kSPS, 4 canales bipolares verdaderos 48-TQFP -40 a 85

Hojas de datos

ADS8342: 16-Bit, 250kSPS, 4-Channel, Parallel Output Analog-to-Digital Converter datasheet
PDF, 1.5 Mb, Archivo publicado: feb 6, 2003
Extracto del documento

Notas de aplicación

  • ADS8342 ADC SAR Inputs
    PDF, 223 Kb, Archivo publicado: enero 6, 2005
    Successive approximation register analog-to-digital converters (SAR ADCs) present a challenging load to the circuitry that drives the analog inputs. Specifications in data sheets may mislead the user into thinking that analog inputs, for example, are static, when in fact they create a highly dynamic load that requires specially designed buffer circuitry. This article looks at the architecture of
  • Controlling the ADS8342 with TMS320 Series DSP's
    PDF, 109 Kb, Archivo publicado: sept 22, 2003
    The ADS8342 16-bit, bipolar input, parallel output analog-to-digital converter has a number of features that allow for an easy interface to many of the TMS320? DSP family of digital signal processors from Texas Instruments. This application note focuses on configuring, sampling, and converting analog data presented to the ADS8342 ADC, with software examples using the TMS320C6711 and C5416 DSPs. Th
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Serie: ADS8342 (3)

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)