Datasheet Microchip 48L512T-I/SN — Ficha de datos

48L512/48LM01
512-Kbit/1-Mbit SPI Serial EERAM
Serial SRAM Features
• Unlimited Reads/Unlimited Writes:
-Standard serial SRAM protocol
-Symmetrical timing for reads and writes
• SRAM Array:
-65,536 x 8 bit (48L512)
-131,072 x 8 bit (48LM01)
• High-Speed SPI Interface:
-Up to 66 MHz
-Schmitt Trigger inputs for noise suppression
• Low-Power CMOS Technology:
-Active current: 5 mA (maximum)
-Standby current: 200 μA (at 85°C maximum)
-Hibernate current: 3 μA (at 85°C maximum) Package Types (not to scale)
8-Lead SOIC/SOIJ
(Top View)
CS 1 8 VCC SO 2 7 HOLD VCAP 3 6 SCK VSS 4 5 SI Pin Function Table
Name Hidden EEPROM Backup Features
• Cell-Based Nonvolatile Backup:
-Mirrors SRAM array cell-for-cell
-Transfers all data to/from SRAM cells in …