Datasheet Texas Instruments OPA820IDBVRG4 — Ficha de datos

FabricanteTexas Instruments
SerieOPA820
Numero de parteOPA820IDBVRG4
Datasheet Texas Instruments OPA820IDBVRG4

Amplificador operacional de ganancia de unidad estable, bajo ruido y retroalimentación de voltaje 5-SOT-23 -40 a 85

Hojas de datos

OPA820 Unity-Gain Stable, Low-Noise, Voltage-Feedback Operational Amplifier datasheet
PDF, 1.6 Mb, Revisión: D, Archivo publicado: dic 12, 2016
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin5
Package TypeDBV
Industry STD TermSOT-23
JEDEC CodeR-PDSO-G
Package QTY3000
CarrierLARGE T&R
Device MarkingNSO
Width (mm)1.6
Length (mm)2.9
Thickness (mm)1.2
Pitch (mm).95
Max Height (mm)1.45
Mechanical DataDescargar

Paramétricos

2nd Harmonic85 dBc
3rd Harmonic95 dBc
@ MHz1
Acl, min spec gain1 V/V
Additional FeaturesN/A
ArchitectureBipolar,Voltage FB
BW @ Acl800 MHz
CMRR(Min)76 dB
CMRR(Typ)85 dB
GBW(Typ)800 MHz
Input Bias Current(Max)16000000 pA
Iq per channel(Max)5.75 mA
Iq per channel(Typ)5.6 mA
Number of Channels1
Offset Drift(Typ)4 uV/C
Operating Temperature Range-40 to 85 C
Output Current(Typ)110 mA
Package GroupSOT-23
Package Size: mm2:W x L5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23) PKG
Rail-to-RailNo
RatingCatalog
Slew Rate(Typ)240 V/us
Total Supply Voltage(Max)12 +5V=5, +/-5V=10
Total Supply Voltage(Min)5 +5V=5, +/-5V=10
Vn at 1kHz(Typ)2.5 nV/rtHz
Vn at Flatband(Typ)2.5 nV/rtHz
Vos (Offset Voltage @ 25C)(Max)1.1 mV

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: DEM-OPA-SOT-1A
    Unpopulated PCB Compatible w/High Speed, Wide Bandwidth Op Amps in SOT(DBV) Pkg
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: DEM-OPA-SO-1A
    DEM-OPA-SO-1A Unpopulated PCB Compatible w/High Speed Wide Bandwidth Op Amps in 8-lead SOIC (D) Pkg
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • RLC Filter Design for ADC Interface Applications (Rev. A)
    PDF, 299 Kb, Revisión: A, Archivo publicado: mayo 13, 2015
    As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD
  • ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers
    PDF, 273 Kb, Archivo publicado: abr 22, 2004
    Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation
  • Wideband Complementary Current Output DAC Single-Ended Interface
    PDF, 597 Kb, Archivo publicado: jun 21, 2005
    High-speed digital-to-analog converters (DACs) most often use a transformer-coupled output stage. In applications where this configuration is not practical, a single op ampdifferential to single-ended stage has often been used. This application note steps through the exact design equations required to achieve gain matching from each output as well as a matched input impedance to each of the DA
  • Measuring Board Parasitics in High-Speed Analog Design
    PDF, 134 Kb, Archivo publicado: jul 7, 2003
    Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq
  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Kb, Revisión: A, Archivo publicado: enero 17, 2005
    As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

Linea modelo

Clasificación del fabricante

  • Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > High-Speed Op Amps (>=50MHz)