Datasheet MCP6L91, MCP6L91R, MCP6L92, MCP6L94 (Microchip) - 5

MCP6L91/1R/2/4 2.0 TYPICAL PERFORMANCE CURVES Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note:
Unless otherwise indicated, TA = +25°C, VDD = 5.0V, VSS = GND, VCM = VSS, VOUT = VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 60 pF.
1.0 0.5 )
V
0.8
DD = 2.4V
)
Representative Part
0.4 0.6 (V (mV 0.3 e
V
0.4 0.2
CMRH – VDD
ange ltag 0.2 o R 0.1 0.0 t V 0.0
One Wafer Lot
e
-40°C
ode -0.2
+25°C
M -0.1 ffs -0.4
+85°C
n O o -0.2 -0.6
+125°C
m -0.3 m -0.8
VCMRL – VSS
Input o C -0.4 -1.0 -0.5 .5 0 5 0 5 0 5 0 -0 0. 0. 1. 1. 2. 2. 3. -50 -25 0 25 50 75 100 125 Common Mode Input Voltage (V) Ambient Temperature (°C) FIGURE 2-1:
Input Offset Voltage vs.
FIGURE 2-4:
Input Common Mode Range Common Mode Input Voltage at VDD = 2.4V. Voltage vs. Ambient Temperature.
1.0 100 )
V +125°C
0.8
DD = 5.5V
V
Representative Part +85°C
m 0.6
+25°C
95
CMRR (VCM = VCMRL to VCMRH)
e ( 0.4
-40°C
B) d 90 ltag 0.2 R ( o
PSRR (VCM = VSS)
V 0.0 85 -0.2 ffset -0.4 RR, PSR 80 t O -0.6 CM 75 -0.8 Inpu -1.0 70 .5 -0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -50 -25 0 25 50 75 100 125 Common Mode Input Voltage (V) Ambient Temperature (°C) FIGURE 2-2:
Input Offset Voltage vs.
FIGURE 2-5:
CMRR, PSRR vs. Ambient Common Mode Input Voltage at VDD = 5.5V. Temperature.
0.5 100 )
Representative Part
0.4 V
VDD = 1.8V
90 0.3 (m ) 80 0.2 B d
CMRR
age
V
lt 0.1
DD = 5.5V
70 o
PSRR–
0.0 RR ( t V 60 -0.1
PSRR+
fse 50 -0.2 RR, PS t Of -0.3 40 CM Inpu -0.4 30 -0.5 20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 1.E+01 10 1.E+02 100 1.E+03 1k 1.E+04 10k 1.E+05 100k Output Voltage (V) Frequency (Hz) FIGURE 2-3:
Input Offset Voltage vs.
FIGURE 2-6:
CMRR, PSRR vs. Output Voltage. Frequency.  2009-2011 Microchip Technology Inc. DS22141B-page 5 Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Test Circuit FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 2.4V. FIGURE 2-2: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V. FIGURE 2-3: Input Offset Voltage vs. Output Voltage. FIGURE 2-4: Input Common Mode Range Voltage vs. Ambient Temperature. FIGURE 2-5: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-6: CMRR, PSRR vs. Frequency. FIGURE 2-7: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-8: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-9: Input Noise Voltage Density vs. Frequency. FIGURE 2-10: The MCP6L91/1R/2/4 Show No Phase Reversal. FIGURE 2-11: Quiescent Current vs. Power Supply Voltage. FIGURE 2-12: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-13: Ratio of Output Voltage Headroom to Output Current vs. Output Current. FIGURE 2-14: Small Signal, Noninverting Pulse Response. FIGURE 2-15: Large Signal, Noninverting Pulse Response. FIGURE 2-16: Slew Rate vs. Ambient Temperature. FIGURE 2-17: Output Voltage Swing vs. Frequency. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 4.0 Application Information 4.1 Rail-to-Rail Inputs FIGURE 4-1: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-2: Output Resistor, RISO stabilizes large capacitive loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-3: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-4: Example Guard Ring Layout. 4.7 Application Circuit FIGURE 4-5: Chebyshev Filter. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product ID System Trademarks Worldwide Sales