Datasheet AD8011 (Analog Devices) - 10

FabricanteAnalog Devices
Descripción300 MHz, 1 mA Current Feedback Amplifier
Páginas / Página17 / 10 — AD8011. THEORY OF OPERATION. DC GAIN CHARACTERISTICS. Z1 = R1 || C1. IPP. …
RevisiónC
Formato / tamaño de archivoPDF / 251 Kb
Idioma del documentoInglés

AD8011. THEORY OF OPERATION. DC GAIN CHARACTERISTICS. Z1 = R1 || C1. IPP. IPN. –VI. IQ1. CP1. IR + IFC. CP2. ICQ + IO. IR – IFC. ICQ – IO. INP

AD8011 THEORY OF OPERATION DC GAIN CHARACTERISTICS Z1 = R1 || C1 IPP IPN –VI IQ1 CP1 IR + IFC CP2 ICQ + IO IR – IFC ICQ – IO INP

Línea de modelo para esta hoja de datos

AD8011

Versión de texto del documento

AD8011 THEORY OF OPERATION
Overall, when high external load drive and low ac distortion is a The AD8011 is a revolutionary generic high speed CF amplifier requirement, a twin gain stage integrating amplifier like the AD8011 that attains new levels of BW, power, distortion, and signal swing will provide superior results for lower power over the traditional capability. If these key parameters were combined as a figure of single-stage complementary devices. In addition, being a CF ac merit performance or [(frequency ⫻ VSIG)/(distortion ⫻ power)], amplifier, closed-loop BW variations versus external gain variations no IC amplifier today would come close to the merit value of the (varying RN) will be much lower compared to a VF op amp, where AD8011 for frequencies above a few MHz. Its wide dynamic the BW varies inversely with gain. Another key attribute of this performance (including noise) is the result of both a new com- amplifier is its ability to run on a single 5 V supply due in part to plementary high speed bipolar process and a new and unique its wide common-mode input and output voltage range capability. architectural design. The AD8011 uses basically a two gain stage For 5 V supply operation, the device obviously consumes half complementary design approach versus the traditional “single the quiescent power (versus 10 V supply) with little degradation stage” complementary mirror structure sometimes referred to as in its ac and dc performance characteristics. See Specifications. the Nelson amplifier. Though twin stages have been tried before, they typically consumed high power since they were of a folded
DC GAIN CHARACTERISTICS
cascade design much like the AD9617. This design allows for Gain stages A1/A1B and A2/A2B combined provide negative the standing or quiescent current to add to the high signal or slew feedforward transresistance gain (see Figure 6). Stage A3 is a unity current induced stages much like the Nelson or single-stage design. gain buffer that provides external load isolation to A2. Each stage Thus, in the time domain, the large signal output rise/fall time uses a symmetrical complementary design. (A3 is also complemen- and slew rate is controlled typically by the small signal BW of the tary though not explicitly shown.) This is done to reduce second amplifier and the input signal step amplitude respectively, not the order signal distortion and overall quiescent power as discussed dc quiescent current of the gain stages (with the exception of previously. In the quasi dc to low frequency region, the closed- input level shift diodes Q1/Q2). Using two stages versus one also loop gain relationship can be approximated as allows for a higher overall gain bandwidth product (GBWP) for G = 1 + RF/RN noninverting operation the same power, thus lower signal distortion and the ability to G = –RF/RN inverting operation drive heavier external loads. In addition, the second gain stage also isolates (divides down) A3’s input reflected load drive and These basic relationships are common to all traditional opera- the nonlinearities created resulting in relatively lower distortion tional amplifiers. Due to the inverting input error current (IE) and higher open-loop gain. required to servo the output and the inverting IE ⫻ RI drop
A1 CD Z1 = R1 || C1 Z1 IPP IPN –VI A2 IQ1 CP1 Q3 IR + IFC CP2 ICQ + IO Q1 V V P N V Z O I Z2 A3 VO RL Q2 CL RF IE RL Q4 IR – IFC ICQ – IO Z1 IQ1 A2 –VI INP C IPN P1 AD8011 A1 CD
Figure 6. Simplified Block Diagram REV. C –9– Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM PRODUCT DESCRIPTION SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ORDERING GUIDE Typical Performance Characteristics THEORY OF OPERATION DC GAIN CHARACTERISTICS AC TRANSFER CHARACTERISTICS DRIVING CAPACITIVE LOADS OPTIMIZING FLATNESS INCREASING BW AT HIGH GAINS DRIVING A SINGLE-SUPPLY A/D CONVERTER LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS Revision History