Datasheet LTC2282 (Analog Devices)

FabricanteAnalog Devices
DescripciónDual 12-Bit, 105Msps Low Power 3V ADC
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FEATURES. DESCRIPTION. Integrated Dual 12-Bit ADCs. Sample Rate: 105Msps. Single 3V Supply (2.85V to 3.4V). Low Power: 540mW

Datasheet LTC2282 Analog Devices

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LTC2282 Dual 12-Bit, 105Msps Low Power 3V ADC
FEATURES DESCRIPTION
n
Integrated Dual 12-Bit ADCs
The LTC®2282 is a 12-bit 105Msps, low power dual 3V n
Sample Rate: 105Msps
A/D converter designed for digitizing high frequency, n
Single 3V Supply (2.85V to 3.4V)
wide dynamic range signals. The LTC2282 is perfect for n
Low Power: 540mW
demanding imaging and communications applications n
70.1dB SNR, 88dB SFDR
with AC performance that includes 70.1dB SNR and 85dB n 110dB Channel Isolation at 100MHz SFDR for signals at the Nyquist frequency. n Flexible Input: 1VP-P to 2VP-P Range DC specs include ±0.4LSB INL (typ), ±0.2LSB DNL (typ) n 575MHz Full Power Bandwidth S/H and no missing codes over temperature. The transition n Clock Duty Cycle Stabilizer noise is a low 0.3LSBRMS. n Shutdown and Nap Modes n Pin Compatible Family A single 3V supply allows low power operation. A separate 105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit) output supply allows the outputs to drive 0.5V to 3.6V 80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit) logic. 65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit) A single-ended CLK input controls converter operation. An 40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit) optional clock duty cycle stabilizer allows high performance 25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit) at full speed for a wide range of clock duty cycles. 10Msps: LTC2290 (12-Bit), LTC2295 (14-Bit) , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. n 64-Pin (9mm × 9mm) QFN Package All other trademarks are the property of their respective owners.
APPLICATIONS
n Wireless and Wired Broadband Communication n Imaging Systems n Spectral Analysis n Portable Instrumentation
TYPICAL APPLICATION SNR vs Input Frequency, –1dB, 2V Range
+ OVDD 12-BIT ANALOG INPUT D11A 73 PIPELINED INPUT A S/H OUTPUT • ADC CORE • – DRIVERS • D0A 72 OGND 71 70 CLK A CLOCK/DUTY CYCLE 69 CONTROL SNR (dBFS) MUX 68 CLK B CLOCK/DUTY CYCLE 67 CONTROL 66 OVDD 65 0 50 100 150 200 250 300 350 D11B + OUTPUT • INPUT FREQUENCY (MHz) 2282 TA01b 12-BIT • ANALOG • INPUT DRIVERS PIPELINED INPUT B D0B S/H ADC CORE – OGND 2282 TA01 2282fb 1