Datasheet LTC2367-16 (Analog Devices) - 4

FabricanteAnalog Devices
Descripción16-Bit, 500ksps, Pseudo-Differential Unipolar SAR ADC with 94.7dB SNR
Páginas / Página24 / 4 — REFERENCE. INPUT The. denotes the specifications which apply over the …
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REFERENCE. INPUT The. denotes the specifications which apply over the full operating temperature range, otherwise

REFERENCE INPUT The denotes the specifications which apply over the full operating temperature range, otherwise

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LTC2367-16
REFERENCE INPUT The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VREF Reference Voltage (Note 5) l 2.5 5.1 V IREF Reference Input Current (Note 9) l 0.24 0.32 mA
DIGITAL INPUTS AND DIGITAL OUTPUTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l 0.8 • OVDD V VIL Low Level Input Voltage l 0.2 • OVDD V IIN Digital Input Current VIN = 0V to OVDD l –10 10 µA CIN Digital Input Capacitance 5 pF VOH High Level Output Voltage IO = –500µA l OVDD – 0.2 V VOL Low Level Output Voltage IO = 500µA l 0.2 V IOZ Hi-Z Output Leakage Current VOUT = 0V to OVDD l –10 10 µA ISOURCE Output Source Current VOUT = 0V –10 mA ISINK Output Sink Current VOUT = OVDD 10 mA
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Supply Voltage l 2.375 2.5 2.625 V OVDD Supply Voltage l 1.71 5.25 V IVDD Supply Current 500ksps Sample Rate l 2.7 3.2 mA IOVDD Supply Current 500ksps Sample Rate (CL = 20pF) 0.1 mA IPD Power Down Mode Conversion Done (IVDD + IOVDD + IREF, VREF > 2V) l 0.9 90 µA IPD Power Down Mode Conversion Done (IVDD + IOVDD + IREF, VREF > 2V, H-Grade) l 0.9 140 µA PD Power Dissipation 500ksps Sample Rate 6.75 8 mW Power Down Mode Conversion Done (IVDD + IOVDD + IREF, VREF > 2V) 2.25 225 µW Power Down Mode Conversion Done (IVDD + IOVDD + IREF, VREF > 2V, H-Grade) 2.25 315 µW
ADC TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency l 500 ksps tCONV Conversion Time l 1 1.5 µs tACQ Acquisition Time tACQ = tCYC – tHOLD (Note 10) l 1.460 µs tHOLD Maximum Time Between Acquisitions l 540 ns tCYC Time Between Conversions l 2 µs tCNVH CNV High Time l 20 ns tBUSYLH CNV↑ to BUSY Delay CL = 20pF l 13 ns tCNVL Minimum Low Time for CNV (Note 11) l 20 ns tQUIET SCK Quiet Time from CNV↑ (Note 10) l 20 ns 236716af 4 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS CONVERTER CHARACTERISTICS DYNAMIC ACCURACY REFERENCE INPUT DIGITAL INPUTS AND DIGITAL OUTPUTS POWER REQUIREMENTS ADC TIMING CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS FUNCTIONAL BLOCK DIAGRAM TIMING DIAGRAM APPLICATIONS INFORMATION TIMING DIAGRAMS BOARD LAYOUT PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATION RELATED PARTS