Datasheet LT3086 (Analog Devices) - 17

LT3086
applicaTions inForMaTion
combination of a 0.4V reference voltage and a precision based on the voltage at the load rather than the LT3086’s 50µA pull-down current. The power good signal pulls high output voltage. In order for the power good threshold to be if the voltage on RPWRGD increases above 0.4V. Built-in independent of the cable drop compensation’s modulation hysteresis of typically 0.6% exist for both the 0.4V volt- of the LT3086’s output voltage as a function of load cur- age threshold and the 50µA current source. Connecting rent, connect a resistor between CDC and RPWRGD with the a resistor between the RPWRGD and PWRGD pins can same value as RCDC, the resistor between CDC and SET. increase the power good hysteresis. See the Application This technique avoids connecting the RPGSET resistor to circuits for an example. the load voltage through a long trace/wire and eliminates potential stray signal coupling into the RPWRGD pin. See IN OUT VOUT LT3086 the front page Typical Application circuit as an example. VIN RSET SHDN SET V x • V LOGIC R OUT(NOMINAL) – 0.4V OR V PGSET = OUT 50µA
Output Voltage Noise and Transient Response
RPGSET WHERE 85% ≤ x ≤ 95% TYPICALLY I R RPGD The LT3086 regulator provides low output voltage noise MON PWRGD VIMON ILIM PWRGD VPWRGD over a 10Hz to 100kHz bandwidth while operating at full GND R C MON PGSET (OPTIONAL) 3086 F02 load. Output voltage noise is approximately 65nV/√Hz over this frequency bandwidth at the unity gain output voltage of 0.4V at 2.1A.
Figure 2. Programming Power Good
To lower output voltage noise for higher output voltages, The PWRGD pin is the power good open-collector logic include a feedforward capacitor, CSET, from OUT to the output. An internal delay of typically 17µs exists only for SET pin, as shown in Figure 3. A good quality, low leakage the rising edge (when the regulator output voltage rises capacitor is recommended. This capacitor bypasses the above the power good threshold) to reject noise or chatter voltage setting resistor, RSET, providing a low frequency during startup. If the power good function is not needed, noise pole. With the use of 10nF for CSET, output voltage leave the RPWRGD and PWRGD pins floating. noise decreases from 280µVRMS to 40µVRMS at 2.1A when The power good threshold is typically programmed to 85% the output voltage is set to 5V. to 95% of the regulated output voltage. Due to variations in IN OUT VOUT regulator parameters and resistor variations, it is not practi- LT3086 VIN R CSET C SET OUT cal to set the power good threshold greater than 95% of the SHDN SET output voltage. Account for load transients where the output IMON VIMON ILIM voltage droops momentarily before recovering. If increasing R GND MON output capacitance to reduce output voltage undershoot or 3086 F03 if setting the power good threshold lower is not possible, a capacitor, C
Figure 3. Feedforward Capacitor for Improved
PGSET, from RPWRGD to ground can filter and delay
Transient Response
the output signal. This allows for a configurable deglitching period before the power good threshold trips. For example, Higher values of output voltage noise are often measured consider an application with a nominal 1V output using 10µF if care is not exercised with regard to circuit layout and of output capacitance and the power good threshold set testing. Crosstalk from nearby active signal traces may for 90% of VOUT(NOMINAL). A 1.5A output load current step induce unwanted noise onto the LT3086’s output. Power momentarily undershoots VOUT below the 90% threshold supply ripple rejection must also be considered. The for more than 4µs, thus triggering the PWRGD pin to pull LT3086 regulator does not have unlimited power supply low. Using a CPGSET of greater than 270pF deglitches the rejection and will pass a small portion of the input noise power good comparator and prevents the PWRGD pin from to the output. pulling low for undershoot events less than 4µs in duration. Using a feedforward capacitor, CSET, has the added benefit For applications using cable drop compensation and re- of improving transient response for output voltages greater quiring a power good signal, calculate the value of RPGSET than 0.4V. With no feedforward capacitor, the settling time 3086fb For more information www.linear.com/LT3086 17 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts