Datasheet AD7944 (Analog Devices)

FabricanteAnalog Devices
Descripción14-Bit, 2.5 MSPS, PulSAR 15.5 mW ADC in LFCSP
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RevisiónC
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14-Bit, 2.5 MSPS, PulSAR,. 15.5 mW ADC in LFCSP. Data Sheet. AD7944. FEATURES. APPLICATION DIAGRAM. 1.8V

Datasheet AD7944 Analog Devices, Revisión: C

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14-Bit, 2.5 MSPS, PulSAR, 15.5 mW ADC in LFCSP Data Sheet AD7944 FEATURES APPLICATION DIAGRAM 1.8V 14-bit resolution with no missing codes TO 5V 2.5V 2.7V Throughput: 2.5 MSPS (TURBO high), 2.0 MSPS (TURBO low) Low power dissipation 15.5 mW at 2.5 MSPS, with external reference BVDD AVDD, VIO 0V DVDD TURBO VIO 28 mW at 2.5 MSPS, with internal reference TO IN+ V SDI 3- OR 4-WIRE INL: ±0.25 LSB typical, ±1.0 LSB maximum REF AD7944 SCK INTERFACE: IN– SPI, CS, SNR SDO DAISY CHAIN 84 dB, with on-chip reference GND REF CNV (TURBO = LOW) 84.5 dB, with external reference 10µF 4.096 V internal reference: typical drift of ±10 ppm/°C Pseudo differential analog input voltage range NOTES
-001
0 V to VREF with VREF up to 5.0 V 1. GND REFERS TO REFGND, AGND, AND DGND.
658 04
Allows use of any input range
Figure 1.
No pipeline delay Logic interface: 1.8 V/2.5 V/2.7 V Proprietary serial interface
an internal reference (and buffer), error correction circuits, and
SPI/QSPI/MICROWIRE/DSP compatible
a versatile serial interface port. On the rising edge of CNV, the
Ability to daisy-chain multiple ADCs with busy indicator
AD7944 samples an analog input, IN+, between 0 V and VREF
20-lead, 4 mm × 4 mm LFCSP (QFN)
with respect to a ground sense, IN−. The AD7944 features a very high sampling rate turbo mode (TURBO high) and a
APPLICATIONS
reduced power normal mode (TURBO low) for low power
Battery-powered equipment
applications where the power is scaled with the throughput.
Communications
In normal mode (TURBO low), the SPI-compatible serial inter-
ATE
face also features the ability, using the SDI input, to daisy-chain
Data acquisition systems
several ADCs on a single 3-wire bus and provide an optional busy
Medical instruments
indicator. The serial interface is compatible with 1.8 V, 2.5 V,
GENERAL DESCRIPTION
and 2.7 V supplies using the separate VIO supply. The AD79441 is a 14-bit, 2.5 MSPS successive approximation The AD7944 is available in a 20-lead LFCSP with operation analog-to-digital converter (SAR ADC). It contains a low power, specified from −40°C to +85°C. high speed, 14-bit sampling ADC, an internal conversion clock, 1 Protected by U.S. Patent 6,703,961.
Table 1. MSOP, LFCSP, 14-/16-/18-Bit PulSAR® ADCs1 Type 100 kSPS 250 kSPS 400 kSPS to 500 kSPS ≥1000 kSPS ADC Driver
14-Bit AD7940 AD79422 AD79462 AD79443 16-Bit AD7680 AD76852 AD76862 AD79802 ADA4941-1 AD7683 AD76872 AD76882 AD79832 ADA4841-1 AD7684 AD7694 AD76932 AD79853 AD8021 18-Bit AD76912 AD76902 AD79822 ADA4941-1 AD79842 ADA4841-1 AD79863 AD8021 1 See www.analog.com for the latest selection of PulSAR ADCs and ADC drivers. 2 Pin-for-pin compatible with all other parts marked with this endnote. 3 The AD7944, AD7985, and AD7986 are pin-for-pin compatible.
Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2009–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION APPLICATION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION CONVERSION MODES OF OPERATION Transfer Functions TYPICAL APPLICATION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT Internal Reference, REF = 4.096 V (PDREF Low) External 1.2 V Reference and Internal Buffer (PDREF High) External Reference (PDREF High, REFIN Low) Reference Decoupling POWER SUPPLY DIGITAL INTERFACE DATA READING OPTIONS Reading During Conversion, Fast Host (Turbo or Normal Mode) Split Reading, Any Speed Host (Turbo or Normal Mode) Reading During Acquisition, Any Speed Host (Turbo or Normal Mode) CS\ MODE, 3-WIRE WITHOUT BUSY INDICATOR CS\ MODE, 3-WIRE WITH BUSY INDICATOR CS\ MODE, 4-WIRE WITHOUT BUSY INDICATOR CS\ MODE, 4-WIRE WITH BUSY INDICATOR CHAIN MODE WITHOUT BUSY INDICATOR CHAIN MODE WITH BUSY INDICATOR APPLICATIONS INFORMATION LAYOUT EVALUATING AD7944 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE