Datasheet AD7986 (Analog Devices)

FabricanteAnalog Devices
Descripción18-Bit, 2 MSPS PulSAR 15 mW ADC in QFN
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RevisiónD
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18-Bit, 2 MSPS, PulSAR. 15 mW ADC in LFCSP. Data Sheet. AD7986. FEATURES. TYPICAL APPLICATION CIRCUIT. 1.8V

Datasheet AD7986 Analog Devices, Revisión: D

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18-Bit, 2 MSPS, PulSAR 15 mW ADC in LFCSP Data Sheet AD7986 FEATURES TYPICAL APPLICATION CIRCUIT 1.8V 18-bit resolution with no missing codes V+ TO 5V 2.5V 2.7V Throughput: 2 MSPS (TURBO = high), 1.5 MSPS (TURBO = low) Low power dissipation 10Ω 0V 15 mW at 2 MSPS, with external reference TO BVDD VIO 1.5nF AVDD, V DVDD REF IN+ TURBO VIO 26 mW at 2 MSPS with internal reference V– SDI 3- OR 4-WIRE INL: ±1 LSB typical, ±2.5 LSB maximum AD7986 INTERFACE: V+ SCK SPI, CS SNR IN– SDO DAISY CHAIN 95.5 dB, with on-chip reference 10Ω REF GND CNV (TURBO = LOW) VREF 97.0 dB, with external reference TO 1.5nF 10µF 4.096 V internal reference: typical drift of 10 ppm/°C 0V V– True differential analog input voltage range: ±VREF
01 0
NOTES
6-
0 V to V
5 9
REF with VREF up to 5.0 V 1. GND REFERS TO REFGND, AGND, AND DGND.
07
Allows use of any input range
Figure 1.
No pipeline delay GENERAL DESCRIPTION Logic interface: 1.8 V/2.5 V/2.7 V Proprietary serial interface: SPI-/QSPI™-/MICROWIRE™-/DSP-
The AD79861 is an 18-bit, 2 MSPS successive approximation,
compatible
analog-to-digital converter (ADC). It contains a low power,
Ability to daisy-chain multiple ADCs with busy indicator
high speed, 18-bit sampling ADC, an internal conversion clock,
20-lead 4 mm × 4 mm LFCSP
an internal reference (and buffer), error correction circuits, and a versatile serial interface port. On the rising edge of CNV, the
APPLICATIONS
AD7986 samples the voltage difference between the IN+ and
Battery-powered equipment
IN− pins. The voltages on these pins usually swing in opposite
Data acquisition systems
phases between 0 V and VREF. It features a very high sampling
Medical instruments
rate turbo mode (TURBO = high) and a reduced power normal
Seismic data acquisition systems
mode (TURBO = low) for low power applications where the power is scaled with the throughput. In normal mode (TURBO = low), the SPI-compatible serial interface also features the ability, using the SDI input, to daisy- chain several ADCs on a single 3-wire bus and provide an optional busy indicator. It is compatible with 1.8 V, 2.5 V, and 2.7 V using the separate VIO supply. The AD7986 is available in a 20-lead LFCSP with operation specified from −40°C to +85°C. 1 Protected by U.S. Patent 6,703,961.
Table 1. MSOP, LFCSP 14-/16-/18-Bit PulSAR® ADCs Type 100 kSPS 250 kSPS 400 kSPS to 500 kSPS ≥1000 kSPS ADC Driver
14-Bit AD7940 AD79421 AD79461 16-Bit AD7680 AD76851 AD76861 AD79801 ADA4941-1 AD7683 AD76871 AD76881 AD79831 ADA4841-1 AD7684 AD7694 AD76931 18-Bit AD76911 AD76901 AD79821 ADA4941-1 AD79841 ADA4841-1 AD7986 AD8021 1 Pin for pin compatible.
Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2009–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION CONVERSION MODES OF OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT Internal Reference, REF = 4.096V (PDREF = Low) External 1.2 V Reference and Internal Buffer (PDREF = High) External Reference (PDREF = High, REFIN = Low) Reference Decoupling POWER SUPPLY DIGITAL INTERFACE DATA READING OPTIONS Reading During Conversion, Fast Hosts (Turbo or Normal Mode) Split-Reading, Any Speed Host (Turbo or Normal Mode) Reading During Acquisition, Any Speed Hosts (Turbo or Normal Mode) /CS MODE, 3-WIRE WITHOUT BUSY INDICATOR /CS MODE, 3-WIRE WITH BUSY INDICATOR /CS MODE, 4-WIRE WITHOUT BUSY INDICATOR /CS MODE, 4-WIRE WITH BUSY INDICATOR CHAIN MODE WITHOUT BUSY INDICATOR CHAIN MODE WITH BUSY INDICATOR APPLICATION HINTS LAYOUT EVALUATING THE PERFORMANCE OF THE AD7986 OUTLINE DIMENSIONS ORDERING GUIDE