Datasheet AD7631 (Analog Devices) - 3
| Fabricante | Analog Devices |
| Descripción | 18-Bit, 250 kSPS, Differential Programmable Input PulSAR® ADC |
| Páginas / Página | 33 / 3 — AD7631. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 12/12—Rev. A to … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 674 Kb |
| Idioma del documento | Inglés |
AD7631. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 12/12—Rev. A to Rev. B. 3/11—Rev. 0 to Rev. A
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AD7631 Data Sheet TABLE OF CONTENTS
Features .. 1 Driver Amplifier Choice ... 20 Applications ... 1 Voltage Reference Input/Output .. 21 General Description ... 1 Power Supplies .. 22 Functional Block Diagram .. 1 Conversion Control ... 23 Revision History ... 2 Interfaces.. 24 Specifications ... 3 Digital Interface .. 24 Timing Specifications .. 5 Parallel Interface ... 24 Absolute Maximum Ratings .. 7 Serial Interface .. 25 ESD Caution .. 7 Master Serial Interface ... 25 Pin Configuration and Function Descriptions ... 8 Slave Serial Interface .. 26 Typical Performance Characteristics ... 12 Hardware Configuration ... 29 Terminology .. 16 Software Configuration ... 29 Theory of Operation .. 17 Microprocessor Interfacing ... 30 Overview .. 17 Application Information .. 31 Converter Operation .. 17 Layout Guidelines... 31 Transfer Functions.. 18 Evaluating Performance .. 31 Typical Connection Diagram ... 18 Outline Dimensions ... 32 Analog Inputs .. 19 Ordering Guide .. 32
REVISION HISTORY 12/12—Rev. A to Rev. B
Changes to Power Sequencing Section .. 23 Updated Outline Dimensions ... 32 Changes to Ordering Guide .. 32
3/11—Rev. 0 to Rev. A
Changes to Resolution Parameter, Table 2 .. 3 Changes to Figure 4 and Table 6 ... 8 Added Exposed Pad Notation to Outline Dimensions ... 32
2/07—Revision 0: Initial Version
Rev. B | Page 2 of 32 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION OVERVIEW CONVERTER OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS Input Range Selection Input Structure Single-to-Differential Driver VOLTAGE REFERENCE INPUT/OUTPUT Internal Reference (REF = 5 V)(PDREF = Low, PDBUF = Low) External 2.5 V Reference and Internal Buffer (REF = 5 V)(PDREF = High, PDBUF = Low) External 5 V Reference (PDREF = High, PDBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLIES Core Supplies High Voltage Supplies Digital Output Supply Power Sequencing Power Dissipation vs. Throughput Power Down CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 18-Bit Interface (Master or Slave) 16-Bit and 8-Bit Interface (Master or Slave) SERIAL INTERFACE Data Interface Serial Configuration Interface MASTER SERIAL INTERFACE Internal Clock (MODE[1:0] = 3, EXT/ = Low) Read During Convert (RDC = High) Read After Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3]) SLAVE SERIAL INTERFACE External Clock (MODE[1:0] = 3, EXT/ = High) External Discontinuous Clock Data Read After Conversion Daisy-Chain Feature External Clock Data Read During Previous Conversion External Clock Data Read After/During Conversion HARDWARE CONFIGURATION SOFTWARE CONFIGURATION MICROPROCESSOR INTERFACING SPI Interface APPLICATION INFORMATION LAYOUT GUIDELINES EVALUATING PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE
AD7631 Data Sheet TABLE OF CONTENTS
Features .. 1 Driver Amplifier Choice ... 20 Applications ... 1 Voltage Reference Input/Output .. 21 General Description ... 1 Power Supplies .. 22 Functional Block Diagram .. 1 Conversion Control ... 23 Revision History ... 2 Interfaces.. 24 Specifications ... 3 Digital Interface .. 24 Timing Specifications .. 5 Parallel Interface ... 24 Absolute Maximum Ratings .. 7 Serial Interface .. 25 ESD Caution .. 7 Master Serial Interface ... 25 Pin Configuration and Function Descriptions ... 8 Slave Serial Interface .. 26 Typical Performance Characteristics ... 12 Hardware Configuration ... 29 Terminology .. 16 Software Configuration ... 29 Theory of Operation .. 17 Microprocessor Interfacing ... 30 Overview .. 17 Application Information .. 31 Converter Operation .. 17 Layout Guidelines... 31 Transfer Functions.. 18 Evaluating Performance .. 31 Typical Connection Diagram ... 18 Outline Dimensions ... 32 Analog Inputs .. 19 Ordering Guide .. 32
REVISION HISTORY 12/12—Rev. A to Rev. B
Changes to Power Sequencing Section .. 23 Updated Outline Dimensions ... 32 Changes to Ordering Guide .. 32
3/11—Rev. 0 to Rev. A
Changes to Resolution Parameter, Table 2 .. 3 Changes to Figure 4 and Table 6 ... 8 Added Exposed Pad Notation to Outline Dimensions ... 32
2/07—Revision 0: Initial Version
Rev. B | Page 2 of 32 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION OVERVIEW CONVERTER OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS Input Range Selection Input Structure Single-to-Differential Driver VOLTAGE REFERENCE INPUT/OUTPUT Internal Reference (REF = 5 V)(PDREF = Low, PDBUF = Low) External 2.5 V Reference and Internal Buffer (REF = 5 V)(PDREF = High, PDBUF = Low) External 5 V Reference (PDREF = High, PDBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLIES Core Supplies High Voltage Supplies Digital Output Supply Power Sequencing Power Dissipation vs. Throughput Power Down CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 18-Bit Interface (Master or Slave) 16-Bit and 8-Bit Interface (Master or Slave) SERIAL INTERFACE Data Interface Serial Configuration Interface MASTER SERIAL INTERFACE Internal Clock (MODE[1:0] = 3, EXT/ = Low) Read During Convert (RDC = High) Read After Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3]) SLAVE SERIAL INTERFACE External Clock (MODE[1:0] = 3, EXT/ = High) External Discontinuous Clock Data Read After Conversion Daisy-Chain Feature External Clock Data Read During Previous Conversion External Clock Data Read After/During Conversion HARDWARE CONFIGURATION SOFTWARE CONFIGURATION MICROPROCESSOR INTERFACING SPI Interface APPLICATION INFORMATION LAYOUT GUIDELINES EVALUATING PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE