Datasheet AD7760 (Analog Devices) - 4

FabricanteAnalog Devices
Descripción2.5 MSPS, 24-Bit, 100 dB Sigma-Delta ADC with On-Chip Buffer
Páginas / Página37 / 4 — REVISION HISTORY. 8/06—Rev. 0 to Rev. A. 7/05—Revision 0: Initial Version
RevisiónA
Formato / tamaño de archivoPDF / 866 Kb
Idioma del documentoInglés

REVISION HISTORY. 8/06—Rev. 0 to Rev. A. 7/05—Revision 0: Initial Version

REVISION HISTORY 8/06—Rev 0 to Rev A 7/05—Revision 0: Initial Version

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AD7760
REVISION HISTORY 8/06—Rev. 0 to Rev. A
Updated Package Option. Universal Added MCLK Jitter Requirements Heading . .24 Change to Features. 1 Changes to Driving the AD7760 Section...26 Changes to Specifications. .4 Changes to Figure 51 . 26 Changes to Absolute Maximum Ratings. 8 Added Figure 52 . 26 Changes to Terminology Section . 11 Changes to Figure 55 . 28 Added Figure 36 Through Figure 39 . 17 Changes to Figure 56 . 29 Added Modulator Data Output Mode Section . .19 Added Exposed Paddle Section. .29 Added Figure 41 Through Figure 47 . 19 Change to Control Register 2—Address 0x0002 Section . 33 Added Modulator Data Output Mode Interface Section. .20 Changes to Status Register (Read Only) Section ..34 Changes to Reading Data Section...22 Added Synchronization Section. 22
7/05—Revision 0: Initial Version
Changes to Clocking the AD7760 Section. .24 Added Buffering the MCLK Signal Section. .24 Rev. A | Page 3 of 36