Datasheet AD7265 (Analog Devices)

FabricanteAnalog Devices
DescripciónDifferential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR A/D Converter
Páginas / Página29 / 1 — Differential/Single-Ended Input, Dual. 1 MSPS, 12-Bit, 3-Channel SAR ADC. …
RevisiónC
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Differential/Single-Ended Input, Dual. 1 MSPS, 12-Bit, 3-Channel SAR ADC. Data Sheet. AD7265. FEATURES. FUNCTIONAL BLOCK DIAGRAM

Datasheet AD7265 Analog Devices, Revisión: C

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Differential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC Data Sheet AD7265 FEATURES FUNCTIONAL BLOCK DIAGRAM Dual 12-bit, 3-channel ADC REF SELECT DCAPA AVDD DVDD Throughput rate: 1 MSPS Specified for VDD of 2.7 V to 5.25 V REF BUF AD7265 Power consumption V 7 mW at 1 MSPS with 3 V supplies A1 VA2 17 mW at 1 MSPS with 5 V supplies 12-BIT V Pin-configurable analog inputs A3 SUCCESSIVE OUTPUT MUX T/H APPROXIMATION DOUTA DRIVERS VA4 12-channel single-ended inputs ADC VA5 6-channel fully differential inputs SCLK VA6 CS 6-channel pseudo differential inputs RANGE 70 dB SINAD at 50 kHz input frequency CONTROL SGL/DIFF LOGIC A0 Accurate on-chip reference: 2.5 V A1 ±0.2% maximum @ 25°C, 20 ppm/°C maximum V A2 B1 Dual conversion with read 875 ns, 16 MHz SCLK VB2 VDRIVE High speed serial interface VB3 MUX 12-BIT SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible VB4 SUCCESSIVE OUTPUT D T/H OUTB APPROXIMATION DRIVERS −40°C to +125°C operation V ADC B5 Shutdown mode: 1 µA maximum VB6 32-lead LFCSP and 32-lead TQFP BUF 2 MSPS version, AD7266 GENERAL DESCRIPTION AGND AGND AGND DCAPB DGND DGND
04674-001 The AD72651 is a dual, 12-bit, high speed, low power, successive Figure 1. approximation ADC that operates from a single 2.7 V to 5.25 V
PRODUCT HIGHLIGHTS
power supply and features throughput rates of up to 1 MSPS. The 1. Two Complete ADC Functions Al ow Simultaneous device contains two ADCs, each preceded by a 3-channel Sampling and Conversion of Two Channels. multiplexer, and a low noise, wide bandwidth track-and-hold Each ADC has three fully/pseudo differential pairs, or six amplifier that can handle input frequencies in excess of 30 MHz. single-ended channels, as programmed. The conversion The conversion process and data acquisition use standard result of both channels is simultaneously available on control inputs al owing easy interfacing to microprocessors or separate data lines, or in succession on one data line if only DSPs. The input signal is sampled on the fal ing edge of CS; one serial port is available. conversion is also initiated at this point. The conversion time is 2. High Throughput with Low Power Consumption. determined by the SCLK frequency. The AD7265 uses advanced The AD7265 offers a 1 MSPS throughput rate with 9 mW design techniques to achieve very low power dissipation at high maximum power dissipation when operating at 3 V. throughput rates. With 5 V supplies and a 1 MSPS throughput rate, the part consumes 4 mA maximum. The part also offers flexible 3. The AD7265 offers both a standard 0 V to VREF input range power/throughput rate management when operating in normal and a 2 × VREF input range. mode, because the quiescent current consumption is so low. 4. No Pipeline Delay. The analog input range for the part can be selected to be a 0 V The part features two standard successive approximation to V ADCs with accurate control of the sampling instant via a CS REF (or 2 × VREF) range, with either straight binary or twos complement output coding. The AD7265 has an on-chip 2.5 V input and once off conversion control. reference that can be overdriven when an external reference is 1 preferred. This external reference range is 100 mV to V Protected by U.S. Patent No. 6,681,332. DD. The AD7265 is available in 32-lead LFCSP and 32-lead TQFP.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2005–2017 Analog Devices, Inc. Al rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technica l Support www.analog.com
Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ANALOG INPUT STRUCTURE ANALOG INPUTS Single-Ended Mode Differential Mode Driving Differential Inputs Using an Op Amp Pair Pseudo Differential Mode ANALOG INPUT SELECTION OUTPUT CODING TRANSFER FUNCTIONS DIGITAL INPUTS VDRIVE MODES OF OPERATION NORMAL MODE PARTIAL POWER-DOWN MODE FULL POWER-DOWN MODE POWER-UP TIMES POWER vs. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7265 TO ADSP-218x AD7265 to ADSP-BF53x AD7265 TO TMS320C541 AD7265 TO DSP563xx APPLICATION HINTS GROUNDING AND LAYOUT PCB DESIGN GUIDELINES FOR LFCSP EVALUATING THE AD7265 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE