Datasheet AD7912, AD7922 (Analog Devices) - 10

FabricanteAnalog Devices
Descripción2-Channel, 2.35 V to 5.25 V, 1 MSPS, 12-Bit A/D Converter
Páginas / Página32 / 10 — AD7912/AD7922. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. 8-LEAD MSOP. …
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AD7912/AD7922. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. 8-LEAD MSOP. 8-LEAD TSOT. DOUT. VDD. DIN. AD7912/. IN1. GND. AD7922. SCLK. VIN0

AD7912/AD7922 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 8-LEAD MSOP 8-LEAD TSOT DOUT VDD DIN AD7912/ IN1 GND AD7922 SCLK VIN0

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AD7912/AD7922 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 8-LEAD MSOP 8-LEAD TSOT DOUT 1 8 VDD DIN 1 8 V AD7912/ IN1 AD7912/ CS 2 7 GND AD7922 SCLK 2 7 VIN0 AD7922 SCLK 3 6 VIN0 CS 3 6 GND TOP VIEW TOP VIEW DIN 4 (Not to Scale) 5 VIN1 DOUT 4 (Not to Scale) 5 VDD
04351-0-008 04351-0-009 Figure 8. 8-Lead MSOP Pin Configuration Figure 9. 8-Lead TSOT Pin Configuration
Table 5. Pin Function Descriptions MSOP TSOT Pin No. Pin No. Mnemonic Function
1 4 DOUT Data Out. Logic output. The conversion result from the AD7912/AD7922 is provided on this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK signal. For the AD7922, the data stream consists of two leading zeros, the channel identifier bit that identifies which channel the conversion result corresponds to, followed by the mode bit that indicates the current mode of operation, followed by the 12 bits of conversion data with MSB first. For the AD7912, the data stream consists of two leading zeros, the channel identifier bit that identifies which channel the conversion result corresponds to, followed by the mode bit that indicates the current mode of operation, followed by the 10 bits of conversion data with MSB first and two trailing zeros. 2 3 CS Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the AD7912/AD7922 and framing the serial data transfer. 3 2 SCLK Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as the clock source for the AD7912/AD7922’s conversion process. 4 1 DIN Data In. Logic input. The channel to be converted is provided on this input and is clocked into an internal register on the falling edge of SCLK. 6, 5 7, 8 VIN0, VIN1 Analog Inputs. These two single-ended analog input channels are multiplexed into the on-chip track-and-hold amplifier. The analog input channel to be converted is selected by writing to the third MSB on the DIN pin. The input range is 0 to VDD. 7 6 GND Analog Ground. Ground reference point for all circuitry on the AD7912/AD7922. All analog input signals should be referred to this GND voltage. 8 5 VDD Power Supply Input. The VDD range for the AD7912/AD7922 is from 2.35 V to 5.25 V. Rev. 0 | Page 10 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS AD7912 SPECIFICATIONS AD7922 SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS DIN INPUT DOUT OUTPUT MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME DAISY-CHAIN MODE DAISY-CHAIN EXAMPLE POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7912/AD7922 to TMS320C541 Interface AD7912/AD7922 to ADSP-218x AD7912/AD7922 to DSP563xx Interface APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING AD7912/AD7922 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE