Datasheet AD7705, AD7706 (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | 3V/5V, 1mW, 3-Channel Pseudo Differential, 16-Bit Sigma-Delta ADC |
| Páginas / Página | 44 / 5 — AD7705/AD7706. SPECIFICATIONS. Table 1. Parameter B. Version1 Unit. … |
| Revisión | C |
| Formato / tamaño de archivo | PDF / 399 Kb |
| Idioma del documento | Inglés |
AD7705/AD7706. SPECIFICATIONS. Table 1. Parameter B. Version1 Unit. Conditions/Comments
Línea de modelo para esta hoja de datos
Versión de texto del documento
link to page 7 link to page 12 link to page 13 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 44 link to page 44 link to page 5 link to page 5 link to page 5 link to page 7 link to page 7 link to page 44 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7
AD7705/AD7706 SPECIFICATIONS
VDD = 3 V or 5 V, REF IN(+) = 1.225 V with VDD = 3 V, and 2.5 V with VDD = 5 V; REF IN(−) = GND; MCLK IN = 2.4576 MHz, unless otherwise noted. All specifications TMIN to TMAX, unless otherwise noted.
Table 1. Parameter B Version1 Unit Conditions/Comments
STATIC PERFORMANCE No Missing Codes 16 Bits min Guaranteed by design, filter notch < 60 Hz Output Noise See Table 5 and Depends on filter cutoffs and selected gain Table 7 Integral Nonlinearity2 ±0.003 % of FSR max Filter notch < 60 Hz, typically ±0.0003% Unipolar Offset Error3 Unipolar Offset Drift4 0.5 μV/°C typ Bipolar Zero Error3 Bipolar Zero Drift4 0.5 μV/°C typ For gains 1, 2, and 4 0.1 μV/°C typ For gains 8, 16, 32, 64, and 128 Positive Full-Scale Error3, 5 Full-Scale Drift4, 6 0.5 μV/°C typ Gain Error3, 7 Gain Drift4, 8 0.5 ppm of FSR/°C typ Bipolar Negative Full-Scale Error2 ±0.003 % of FSR typ Typically ±0.001% Bipolar Negative Full-Scale Drift4 1 μV/°C typ For gains of 1 to 4 0.6 μV/°C typ For gains of 8 to 128 ANALOG INPUTS/REFERENCE INPUTS Specifications for AIN and REF IN, unless otherwise noted Common-Mode Rejection (CMR)2 VDD = 5 V Gain = 1 96 dB typ Gain = 2 105 dB typ Gain = 4 110 dB typ Gain = 8 to 128 130 dB typ VDD = 3 V Gain = 1 105 dB typ Gain = 2 110 dB typ Gain = 4 120 dB typ Gain = 8 to 128 130 dB typ Normal-Mode 50 Hz Rejection2 98 dB typ For filter notches of 25 Hz, 50 Hz, ±0.02 × fNOTCH Normal-Mode 60 Hz Rejection2 98 dB typ For filter notches of 20 Hz, 60 Hz, ±0.02 × fNOTCH Common-Mode 50 Hz Rejection2 150 dB typ For filter notches of 25 Hz, 50 Hz, ±0.02 × fNOTCH Common-Mode 60 Hz Rejection2 150 dB typ For filter notches of 20 Hz, 60 Hz, ±0.02 × fNOTCH Absolute/Common-Mode REF IN GND to VDD V min to V max Voltage2 Absolute/Common-Mode AIN GND − 100 mV V min BUF bit of setup register = 0 Voltage2, 9, 10 VDD + 30 mV V max Absolute/Common-Mode AIN GND + 50 mV V min BUF bit of setup register = 1 Voltage2, 9 VDD − 1.5 V V max AIN DC Input Current2 1 nA max AIN Sampling Capacitance2 10 pF max AIN Differential Voltage Range11 0 to +VREF/gain12 nom Unipolar input range (B/U bit of setup register = 1) ±VREF/gain nom Bipolar input range (B/U bit of setup register = 0) Rev. C | Page 5 of 44 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS OUTPUT NOISE (5 V OPERATION) OUTPUT NOISE (3 V OPERATION) TYPICAL PERFORMANCE CHARACTERISTICS ON-CHIP REGISTERS COMMUNICATION REGISTER (RS2, RS1, RS0 = 0, 0, 0) SETUP REGISTER (RS2, RS1, RS0 = 0, 0, 1); POWER-ON/RESET STATUS: 01 HEXADECIMAL CLOCK REGISTER (RS2, RS1, RS0 = 0, 1, 0); POWER-ON/RESET STATUS: 05 HEXADECIMAL DATA REGISTER (RS2, RS1, RS0 = 0, 1, 1) TEST REGISTER (RS2, RS1, RS0 = 1, 0, 0); POWER-ON/RESET STATUS: 00 HEXADECIMAL ZERO-SCALE CALIBRATION REGISTER (RS2, RS1, RS0 = 1, 1, 0); POWER-ON/RESET STATUS: 1F4000 HEXADECIMAL FULL-SCALE CALIBRATION REGISTER (RS2, RS1, RS0 = 1, 1, 1); POWER-ON/RESET STATUS: 5761AB HEXADECIMAL Calibration Sequences CIRCUIT DESCRIPTION ANALOG INPUT Ranges Sample Rate BIPOLAR/UNIPOLAR INPUT REFERENCE INPUT DIGITAL FILTERING Filter Characteristics Postfiltering ANALOG FILTERING CALIBRATION Self-Calibration System Calibration Span and Offset Limits Power-Up and Calibration THEORY OF OPERATION CLOCKING AND OSCILLATOR CIRCUIT SYSTEM SYNCHRONIZATION RESET INPUT STANDBY MODE ACCURACY DRIFT CONSIDERATIONS POWER SUPPLIES SUPPLY CURRENT GROUNDING AND LAYOUT EVALUATING THE PERFORMANCE DIGITAL INTERFACE CONFIGURING THE AD7705/AD7706 MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7705/AD7706-to-68HC11 Interface AD7705/AD7706-to-8051 Interface AD7705/AD7706-to-ADSP-2103/ADSP-2105 Interface CODE FOR SETTING UP THE AD7705/AD7706 C Code for Interfacing AD7705 to 68HC11 APPLICATIONS PRESSURE MEASUREMENT TEMPERATURE MEASUREMENT SMART TRANSMITTERS BATTERY MONITORING OUTLINE DIMENSIONS ORDERING GUIDE
AD7705/AD7706 SPECIFICATIONS
VDD = 3 V or 5 V, REF IN(+) = 1.225 V with VDD = 3 V, and 2.5 V with VDD = 5 V; REF IN(−) = GND; MCLK IN = 2.4576 MHz, unless otherwise noted. All specifications TMIN to TMAX, unless otherwise noted.
Table 1. Parameter B Version1 Unit Conditions/Comments
STATIC PERFORMANCE No Missing Codes 16 Bits min Guaranteed by design, filter notch < 60 Hz Output Noise See Table 5 and Depends on filter cutoffs and selected gain Table 7 Integral Nonlinearity2 ±0.003 % of FSR max Filter notch < 60 Hz, typically ±0.0003% Unipolar Offset Error3 Unipolar Offset Drift4 0.5 μV/°C typ Bipolar Zero Error3 Bipolar Zero Drift4 0.5 μV/°C typ For gains 1, 2, and 4 0.1 μV/°C typ For gains 8, 16, 32, 64, and 128 Positive Full-Scale Error3, 5 Full-Scale Drift4, 6 0.5 μV/°C typ Gain Error3, 7 Gain Drift4, 8 0.5 ppm of FSR/°C typ Bipolar Negative Full-Scale Error2 ±0.003 % of FSR typ Typically ±0.001% Bipolar Negative Full-Scale Drift4 1 μV/°C typ For gains of 1 to 4 0.6 μV/°C typ For gains of 8 to 128 ANALOG INPUTS/REFERENCE INPUTS Specifications for AIN and REF IN, unless otherwise noted Common-Mode Rejection (CMR)2 VDD = 5 V Gain = 1 96 dB typ Gain = 2 105 dB typ Gain = 4 110 dB typ Gain = 8 to 128 130 dB typ VDD = 3 V Gain = 1 105 dB typ Gain = 2 110 dB typ Gain = 4 120 dB typ Gain = 8 to 128 130 dB typ Normal-Mode 50 Hz Rejection2 98 dB typ For filter notches of 25 Hz, 50 Hz, ±0.02 × fNOTCH Normal-Mode 60 Hz Rejection2 98 dB typ For filter notches of 20 Hz, 60 Hz, ±0.02 × fNOTCH Common-Mode 50 Hz Rejection2 150 dB typ For filter notches of 25 Hz, 50 Hz, ±0.02 × fNOTCH Common-Mode 60 Hz Rejection2 150 dB typ For filter notches of 20 Hz, 60 Hz, ±0.02 × fNOTCH Absolute/Common-Mode REF IN GND to VDD V min to V max Voltage2 Absolute/Common-Mode AIN GND − 100 mV V min BUF bit of setup register = 0 Voltage2, 9, 10 VDD + 30 mV V max Absolute/Common-Mode AIN GND + 50 mV V min BUF bit of setup register = 1 Voltage2, 9 VDD − 1.5 V V max AIN DC Input Current2 1 nA max AIN Sampling Capacitance2 10 pF max AIN Differential Voltage Range11 0 to +VREF/gain12 nom Unipolar input range (B/U bit of setup register = 1) ±VREF/gain nom Bipolar input range (B/U bit of setup register = 0) Rev. C | Page 5 of 44 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS OUTPUT NOISE (5 V OPERATION) OUTPUT NOISE (3 V OPERATION) TYPICAL PERFORMANCE CHARACTERISTICS ON-CHIP REGISTERS COMMUNICATION REGISTER (RS2, RS1, RS0 = 0, 0, 0) SETUP REGISTER (RS2, RS1, RS0 = 0, 0, 1); POWER-ON/RESET STATUS: 01 HEXADECIMAL CLOCK REGISTER (RS2, RS1, RS0 = 0, 1, 0); POWER-ON/RESET STATUS: 05 HEXADECIMAL DATA REGISTER (RS2, RS1, RS0 = 0, 1, 1) TEST REGISTER (RS2, RS1, RS0 = 1, 0, 0); POWER-ON/RESET STATUS: 00 HEXADECIMAL ZERO-SCALE CALIBRATION REGISTER (RS2, RS1, RS0 = 1, 1, 0); POWER-ON/RESET STATUS: 1F4000 HEXADECIMAL FULL-SCALE CALIBRATION REGISTER (RS2, RS1, RS0 = 1, 1, 1); POWER-ON/RESET STATUS: 5761AB HEXADECIMAL Calibration Sequences CIRCUIT DESCRIPTION ANALOG INPUT Ranges Sample Rate BIPOLAR/UNIPOLAR INPUT REFERENCE INPUT DIGITAL FILTERING Filter Characteristics Postfiltering ANALOG FILTERING CALIBRATION Self-Calibration System Calibration Span and Offset Limits Power-Up and Calibration THEORY OF OPERATION CLOCKING AND OSCILLATOR CIRCUIT SYSTEM SYNCHRONIZATION RESET INPUT STANDBY MODE ACCURACY DRIFT CONSIDERATIONS POWER SUPPLIES SUPPLY CURRENT GROUNDING AND LAYOUT EVALUATING THE PERFORMANCE DIGITAL INTERFACE CONFIGURING THE AD7705/AD7706 MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7705/AD7706-to-68HC11 Interface AD7705/AD7706-to-8051 Interface AD7705/AD7706-to-ADSP-2103/ADSP-2105 Interface CODE FOR SETTING UP THE AD7705/AD7706 C Code for Interfacing AD7705 to 68HC11 APPLICATIONS PRESSURE MEASUREMENT TEMPERATURE MEASUREMENT SMART TRANSMITTERS BATTERY MONITORING OUTLINE DIMENSIONS ORDERING GUIDE