Datasheet AD524 (Analog Devices) - 3

FabricanteAnalog Devices
DescripciónPrecision Instrumentation Amplifier
Páginas / Página29 / 3 — AD524. TABLE OF CONTENTS. REVISION HISTORY. 11/07—Rev. E to Rev. F. …
RevisiónG
Formato / tamaño de archivoPDF / 497 Kb
Idioma del documentoInglés

AD524. TABLE OF CONTENTS. REVISION HISTORY. 11/07—Rev. E to Rev. F. 4/99—Rev. D to Rev. E

AD524 TABLE OF CONTENTS REVISION HISTORY 11/07—Rev E to Rev F 4/99—Rev D to Rev E

Línea de modelo para esta hoja de datos

AD524

Versión de texto del documento

link to page 4 link to page 9 link to page 10 link to page 15 link to page 16 link to page 19 link to page 19 link to page 21 link to page 25 link to page 26 link to page 1 link to page 1 link to page 3 link to page 1 link to page 9 link to page 9 link to page 16 link to page 16 link to page 17 link to page 18 link to page 18 link to page 19 link to page 21 link to page 22 link to page 1
AD524 TABLE OF CONTENTS
Features .. 1 Input Offset and Output Offset .. 15 Functional Block Diagram .. 1 Gain .. 16 General Description ... 1 Input Bias Currents .. 17 Product Highlights ... 1 Common-Mode Rejection .. 17 Revision History ... 2 Grounding ... 18 Specifications ... 3 Sense Terminal .. 18 Absolute Maximum Ratings .. 8 Reference Terminal .. 18 Connection Diagrams .. 8 Programmable Gain ... 20 ESD Caution .. 8 Autozero Circuits ... 20 Typical Performance Characteristics ... 9 Error Budget Analysis .. 21 Test Circuits ... 14 Outline Dimensions ... 24 Theory of Operation .. 15 Ordering Guide .. 25 Input Protection .. 15
REVISION HISTORY 11/07—Rev. E to Rev. F
Updated Format .. Universal Changes to General Description .. 1 Changes to Figure 1 .. 1 Changes to Figure 3 and Figure 4 Captions .. 8 Changes to Error Budget Analysis Section ... 21 Changes to Ordering Guide .. 25
4/99—Rev. D to Rev. E
Rev. F | Page 2 of 28 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAMS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION INPUT PROTECTION INPUT OFFSET AND OUTPUT OFFSET GAIN INPUT BIAS CURRENTS COMMON-MODE REJECTION GROUNDING SENSE TERMINAL REFERENCE TERMINAL PROGRAMMABLE GAIN AUTOZERO CIRCUITS ERROR BUDGET ANALYSIS OUTLINE DIMENSIONS ORDERING GUIDE