Datasheet ATM90E26 (Microchip) - 38

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CS2 Checksum 2
Address: 3BH Type: Read/Write Default Value: 0000H 15 14 13 12 11 10 9 8 CS2_15 CS2_14 CS2_13 CS2_12 CS2_11 CS2_10 CS2_9 CS2_8 7 6 5 4 3 2 1 0 CS2_7 CS2_6 CS2_5 CS2_4 CS2_3 CS2_2 CS2_1 CS2_0
Bit Name Description
The CS2 register should be written after the 31H-3AH registers are written. Suppose the high byte and the low byte of the 31H-3AH registers are shown in below table.
High Low Register Address Byte Byte
31H H31 L31 32H H32 L32 33H H33 L33 34H H34 L34 35H H35 L35 36H H36 L36 37H H37 L37 15 - 0 CS2[15:0] 38H H38 L38 39H H39 L39 3AH H3A L3A The calculation of the CS2 register is as follows: The low byte of 3BH register is:
L3B
=MOD(
H31
+
H32
+...+
H3A
+
L31
+
L32
+...+
L3A
, 2^8) The high byte of 3BH register is:
H3B
=
H31
XOR
H32
XOR ... XOR
H3A
XOR
L31
XOR
L32
XOR ... XOR
L3A
The M90E26 calculates CS2 regularly. If the value of the CS2 register and the calculation by the M90E26 is different when AdjStart=8765H, the AdjErr[1:0] bits (SysStatus, 01H) are set.
Note:
The readout value of the CS2 register is the calculation by the M90E26, which is different from what is written. M90E26 [DATASHEET] 38 Atmel-46002B-SE-M90E26-Datasheet_110714 Document Outline Features Application Description Block Diagram 1 Pin Assignment 2 Pin Description 3 Functional Description 3.1 Dynamic Metering Range 3.2 Startup and No-Load Power 3.3 Energy Registers 3.4 N Line Metering and Anti-Tampering 3.4.1 Metering Mode and L/N Line Current Sampling Gain Configuration 3.4.2 Anti-Tampering Mode Threshold Compare Method Special Treatment at Low Power 3.5 Measurement and Zero-Crossing 3.5.1 Measurement 3.5.2 Zero-Crossing 3.6 Calibration 3.7 Reset 4 Interface 4.1 SPI Interface 4.1.1 Four-Wire Mode Read Sequence Write Sequence 4.1.2 Three-Wire Mode 4.1.3 Timeout and Protection 4.2 UART Interface 4.2.1 Byte Level Timing 4.2.2 Write Transaction 4.2.3 Read transaction 4.2.4 Checksum 4.3 WarnOut Pin for Fatal Error Warning 4.4 Low Cost Implementation in Isolation with MCU 5 Register 5.1 Register List 5.2 Status and Special Register SoftReset Software Reset SysStatus System Status FuncEn Function Enable SagTh Voltage Sag Threshold SmallPMod Small-Power Mode LastData Last Read/Write SPI/UART Value 5.3 Metering/ Measurement Calibration and Configuration 5.3.1 Metering Calibration and Configuration Register LSB RMS/Power 16-bit LSB CalStart Calibration Start Command PLconstH High Word of PL_Constant PLconstL Low Word of PL_Constant Lgain L Line Calibration Gain Lphi L Line Calibration Angle Ngain N Line Calibration Gain Nphi N Line Calibration Angle PStartTh Active Startup Power Threshold PNolTh Active No-Load Power Threshold QStartTh Reactive Startup Power Threshold QNolTh Reactive No-Load Power Threshold MMode Metering Mode Configuration CS1 Checksum 1 5.3.2 Measurement Calibration Register AdjStart Measurement Calibration Start Command Ugain Voltage rms Gain IgainL L Line Current rms Gain IgainN N Line Current rms Gain Uoffset Voltage Offset IoffsetL L Line Current Offset IoffsetN N Line Current Offset PoffsetL L Line Active Power Offset QoffsetL L Line Reactive Power Offset PoffsetN N Line Active Power Offset QoffsetN N Line Reactive Power Offset CS2 Checksum 2 5.4 Energy Register Theory of Energy Registers APenergy Forward Active Energy ANenergy Reverse Active Energy ATenergy Absolute Active Energy RPenergy Forward (Inductive) Reactive Energy RNenergy Reverse (Capacitive) Reactive Energy RTenergy Absolute Reactive Energy EnStatus Metering Status 5.5 Measurement Register Irms L Line Current rms Urms Voltage rms Pmean L Line Mean Active Power Qmean L Line Mean Reactive Power Freq Voltage Frequency PowerF L Line Power Factor Pangle Phase Angle between Voltage and L Line Current Smean L Line Mean Apparent Power Irms2 N Line Current rms Pmean2 N Line Mean Active Power Qmean2 N Line Mean Reactive Power PowerF2 N Line Power Factor Pangle2 Phase Angle between Voltage and N Line Current Smean2 N Line Mean Apparent Power 6 Electrical Specification 6.1 Electrical Specification 6.2 SPI Interface Timing 6.3 Power On Reset Timing 6.4 Zero-Crossing Timing 6.5 Voltage Sag Timing 6.6 Pulse Output 6.7 Absolute Maximum Rating Ordering Information Packaging Drawings Revision History