Datasheet LTC4315 (Analog Devices) - 3

FabricanteAnalog Devices
Descripción2-Wire Bus Buffer with High Noise Margin
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ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply over the full operating

ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating

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LTC4315
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = VCC2 = 3.3V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply/Start-Up
VCC Input Supply Voltage l 2.9 5.5 V VDD,BUS 2-Wire Bus Supply Voltage (Note 3) l 1.4 5.5 V VCC2 Output Side Accelerator l 2.25 5.5 V Supply Voltage ICC Input Supply Current VENABLE = VCC = VCC2 = 5.5V, VSDAIN,SCLIN = 0V (Note 4) l 6 8.1 10 mA ICC(DISABLED) Input Supply Current VENABLE = 0V, VCC = VCC2 = 5.5V, VSDAIN,SCLIN = 0V l 2.3 3.3 4.3 mA ICC2 VCC2 Supply Current VENABLE = VCC = VCC2 = 5.5V, VSDAIN,SCLIN = 0V (Note 4) l 0.2 0.31 0.4 mA ICC2(DISABLED) VCC2 Supply Current VENABLE = 0V, VCC = VCC2 = 5.5V, VSDAIN,SCLIN = 0V l 0.15 0.25 0.35 mA VTH_UVLO VCC UVLO Threshold VCC Rising l 2.55 2.7 2.85 V VCC_UVLO(HYST) UVLO Threshold Hysteresis 200 mV Voltage VPRE Precharge Voltage SDA, SCL Pins Open l 0.8 1 1.2 V
Buffers
VOS(SAT) Buffer Offset Voltage IOL = 4mA, Driven VSDA,SCL = 50mV l 100 190 280 mV IOL = 500μA, Driven VSDA,SCL = 50mV l 15 60 120 mV VOS Buffer Offset Voltage IOL = 4mA, Driven VSDA,SCL = 200mV l 50 120 180 mV IOL = 500μA, Driven VSDA,SCL = 200mV l 15 60 115 mV VIL(FALLING) Buffer Input Logic Low (Notes 5 and 6) l 0.3 • VMIN 0.33 • VMIN 0.36 • VMIN V Voltage VIL(HYST) VIL Hysteresis Voltage 50 mV ILEAK Input Leakage Current SDA, SCL Pins = 5.5V, VCC = 5.5V, 0V l ±10 μA CIN Input Capacitance SDA, SCL Pins (Note 7) l 10 pF
Rise Time Accelerators
dV Minimum Slew Rate SDA, SCL Pins, VCC = VCC2 = 5V l 0.1 0.2 0.4 V/μs dt (RTA) Requirement VRTA(TH) Rise Time Accelerator DC VCC = VCC2 = 5V (Note 5) l 0.38 • VMIN 0.41 • VMIN 0.44 • VMIN V Threshold Voltage ΔVACC Buffers Off to Accelerator On SDA, SCL Pins, VCC = VCC2 = 5V (Note 5) l 0.05 • VMIN 0.07 • VMIN V Voltage IRTA Rise Time Accelerator Pull-Up SDA, SCL Pins Current ACC Grounded, VCC = VCC2 = 5V (Note 8) l 15 25 40 mA ACC Open, VCC = VCC2 = 5V (Note 8) l 1.5 2.5 3.5 mA
Enable/Control
VEN(TH) ENABLE Threshold Voltage l 1 1.4 1.8 V VDISCEN(TH) DISCEN Threshold Voltage l 1 1.4 1.8 V ILEAK Input Leakage Current DISCEN, ENABLE Pins, VCC = 5.5V l 0.1 ±1 μA VACC(L,TH) ACC Input Low Threshold VCC = 5V l 0.2 • VCC 0.3 • VCC 0.4 • VCC V Voltage VACC(H,TH) ACC Input High Threshold VCC = 5V l 0.7 • VCC 0.8 • VCC 0.9 • VCC V Voltage IACC(IN,HL) ACC High, Low Input Current VCC = VCC2 = 5V, VACC = 5V, 0V l ±23 ±40 μA 4315f 3 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS