Datasheet LTC4317 (Analog Devices) - 3

FabricanteAnalog Devices
DescripciónDual I2C/SMBus Address Translator
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elecTrical characTerisTics. The. denotes the specifications which apply over the full operating

elecTrical characTerisTics The denotes the specifications which apply over the full operating

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LTC4317
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Supply
VCC Input Supply Range l 2.25 5.5 V ICC Input Supply Current ENABLE = 3.3V, SCLIN = SDAIN = 0V l 0.8 2 mA ENABLE = 0V, SCLIN = SDAIN = 0V l 350 800 µA VCC(UVLO) VCC Supply Undervoltage Lockout VCC Rising l 1.9 2.1 2.2 V VCC(HYST) VCC Supply Undervoltage Lockout Hysteresis 100 mV
ENABLE and READY
VENABLE(TH) ENABLE Threshold Voltage Enable Rising l 1 1.4 1.8 V VENABLE(HYST) ENABLE Hysteresis 50 mV IENABLE(LEAK) ENABLE Input Current l ±1 µA VREADY(OL) READY Output Low Voltage I = 3mA l 0.4 V IREADY(OH) READY Off Leakage Current VCC = VREADY = 5.5V l ±5 µA
SCLIN, SDAIN, SCLOUT, SDAOUT
VSCL,SDA(TH) Threshold Voltage SDA, SCL Pins Rising l 1.5 1.8 2.0 V VSCL,SDA(HYST) Hysteresis 50 mV ISCL,SDA(LEAK) Leakage Current SDA, SCL Pins = 5.5V, 0V, VCC = 5.5V, 0V l ±10 µA ISCL,SDA(LEAK-INOUT) Input to Output Leakage Current SDAIN, SCLIN Pins = 5.5V, VCC = 5.5V, l ±10 µA SDAOUT, SCLOUT Pins = 4.5V CSCL,SDA Pin Capacitance Note 3 l 10 pF VSCL,SDA(PRE) Precharge Voltage l 0.8 1 1.2 V VSDAOUT(OL) SDAOUT Output Low Voltage I = 4mA l 0.4 V RDS(ON) Pass Switch On Resistance VCC = 2.25V, SCLIN = SDAIN = 0.4V l 3 12 Ω VCC = 3.3V, SCLIN = SDAIN = 0.4V l 2.2 8 Ω VCC = 5V, SCLIN = SDAIN = 0.4V l 1.8 6 Ω
XORH, XORL
IXORH/XORL XORH and XORL Input Current l ±100 nA
I2C Interface Timing
fSCL(MAX) Maximum SCLIN Clock Frequency Note 3 l 400 kHz tPDHL(SDAOUTn) SDAOUT Fall Delay C = 100pF, RPULLUP = 10k l 170 300 ns tf(SDAOUTn) SDAOUT Fall Time C = 100pF, RPULLUP = 10k l 20 60 300 ns tTIMEOUT Stuck Bus Timeout SCLIN Held Low or High l 25 30 35 ms tIDLE Bus Idle Time l 80 120 160 µs tGLITCH SCLIN and SDAIN Glitch Filter l 50 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 2:
All currents into pins are positive and all voltages are referenced to may cause permanent damage to the device. Exposure to any Absolute GND unless otherwise indicated. Maximum Rating condition for extended periods may affect device
Note 3:
Guaranteed by design and not tested. reliability and lifetime. 4317fa For more information www.linear.com/LTC4317 3 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Timing Diagram Typical Performance Characteristics Pin Functions Block Diagram Operation Typical Applications Package Description Revision History Typical Application Related Parts