Datasheet AD8451 (Analog Devices) - 6

Data Sheet AD8451 Parameter Test Conditions/Comments Min Typ Max Unit
Voltage Noise f = 1 kHz 10 nV/√Hz Voltage Noise, Peak to Peak f = 0.1 Hz to 10 Hz 0.3 µV p-p Current Noise f = 1 kHz, CV buffer only 80 fA/√Hz Current Noise, Peak to Peak f = 0.1 Hz to 10 Hz 5 pA p-p Small Signal −3 dB Bandwidth 3 MHz Slew Rate ΔVOUT = 10 V 1 V/µs VOLTAGE REFERENCE Nominal Output Voltage With respect to AGND 2.5 V Output Voltage Error ±1 % Temperature Drift TA = TMIN to TMAX 10 ppm/°C Line Regulation ΔVS = 10 V 40 ppm/V Load Regulation ΔIVREF = 1 mA (source only) 400 ppm/mA Output Current, Sourcing 10 mA Voltage Noise f = 1 kHz 100 nV/√Hz Voltage Noise, Peak to Peak f = 0.1 Hz to 10 Hz 5 µV p-p DIGITAL INTERFACE, MODE INPUT MODE pin (Pin 39) Input Voltage High, VIH With respect to DGND 2.0 DVCC V Input Voltage Low, VIL With respect to DGND DGND 0.8 V Mode Switching Time 500 ns POWER SUPPLY Operating Voltage Range AVCC 5 36 V AVEE −31 0 V Analog Supply Range AVCC − AVEE 5 36 V DVCC 3 5 V Quiescent Current AVCC 7 10 mA AVEE 6.5 10 mA DVCC 40 70 µA TEMPERATURE RANGE For Specified Performance −40 +85 °C Operational −55 +125 °C Rev. 0 | Page 5 of 32 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS IA CHARACTERISTICS DA CHARACTERISTICS CC AND CV LOOP FILTER AMPLIFIERS, AND VSET BUFFER VINT BUFFER REFERENCE CHARACTERISTICS THEORY OF OPERATION OVERVIEW INSTRUMENTATION AMPLIFIER (IA) Reversing Polarity When Charging and Discharging IA Offset Option Battery Reversal and Overvoltage Protection DIFFERENCE AMPLIFIER (DA) CC AND CV LOOP FILTER AMPLIFIERS Compensation VINT Buffer MODE PIN, CHARGE AND DISCHARGE CONTROL APPLICATIONS INFORMATION FUNCTIONAL DESCRIPTION POWER SUPPLY CONNECTIONS CURRENT SENSE IA CONNECTIONS Current Sensors Optional Low-Pass Filter VOLTAGE SENSE DA CONNECTIONS Reverse Battery Conditions BATTERY CURRENT AND VOLTAGE CONTROL INPUTS (ISET AND VSET) LOOP FILTER AMPLIFIERS CONNECTING TO A PWM CONTROLLER (VCTRL PIN) STEP-BY-STEP DESIGN EXAMPLE Step 1: Design the Switching Power Converter Step 2: Identify the Control Voltage Range of the ADP1972 Step 3: Determine the Control Voltage for the CV Loop Step 4: Determine the Control Voltage for the CC Loop and the Shunt Resistor Step 5: Choose the Control Voltage Sources Step 6: Select the Compensation Devices EVALUATION BOARD INTRODUCTION FEATURES AND TESTS EVALUATING THE AD8451 Test the Instrumentation Amplifier 20 mV Offset at IMEAS Output Test the Difference Amplifier 5 mV Offset at BVMEAS Output CC and CV Integrator Tests Loop Compensation SCHEMATIC AND ARTWORK OUTLINE DIMENSIONS ORDERING GUIDE