Datasheet KS8995MA, KS8995FQ (Microchip) - 69

FabricanteMicrochip
DescripciónIntegrated 5-Port 10/100 Managed Switch
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Micrel, Inc. KS8995MA/FQ Dynamic MAC Address

Micrel, Inc KS8995MA/FQ Dynamic MAC Address

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Micrel, Inc. KS8995MA/FQ Dynamic MAC Address
The table below is read only; the contents are managed by the KS8995MA/FQ only.
Address Name Description Mode Default RO 1 RO 0 Format of Dynamic MAC Address Table (1K entries)
68 MAC Empty 1, there is no valid entry in the table.
0, there are valid entries in the table.
Indicates how many valid entries in the table.
0x3ff means 1K entries 67 − 58 No of Valid Entries 0x1 means 2 entries
0x0 and bit 68 = 0: means 1 entry
0x0 and bit 68 = 1: means 0 entry 57 − 56
55 Time Stamp
Data Ready 2-bit counters for internal aging RO 1, The entry is not ready, retry until this bit is set to 0.
0, The entry is ready. RO The source port where FID+MAC is learned.
000 port 1
54 − 52 Source Port 001 port 2
010 port 3 RO 0x0 011 port 4
100 port 5
51 − 48 FID Filter ID. RO 0x0 47 − 0 MAC Address 48-bit MAC address. RO 0x0 Dynamic MAC Address Table Read Example (1) Dynamic MAC Address Table Read (read the 1st entry), and retrieve the MAC table size
Write to Register 110 with 0x18 (read dynamic table selected)
Write to Register 111 with 0x0 (trigger the read operation)
Then,
Read Register 112 (68-64)
Read Register 113 (63-56); // the above two registers show # of entries
Read Register 114 (55-48) // if bit 55 is 1, restart (reread) from this register
Read Register 115 (47-40)
Read Register 116 (39-32)
Read Register 117 (31-24)
Read Register 118 (23-16)
Read Register 119 (15-8)
Read Register 120 (7-0) October 2011 69 M9999-102611-3.0