Datasheet KS8995X (Microchip) - 3
| Fabricante | Microchip |
| Descripción | Integrated 5-Port 10/100 QoS Switch |
| Páginas / Página | 51 / 3 — KS8995X Micrel Revision History |
| Formato / tamaño de archivo | PDF / 224 Kb |
| Idioma del documento | Inglés |
KS8995X Micrel Revision History
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KS8995X Micrel Revision History
Revision Date Summary of Changes 1.08 4/01/02 Created. 1.09 5/20/02 Changed MII setting descriptions. Changed pu/pd descriptions for SMRXD2.
Changed pu/pd description for forced flow control.
Edited large packet sizes back in, also in “Register 4.”
Added in typical supply current numbers for 100BaseTX and 10BaseTX operation.
Added in note for illegal half-duplex, force flow control.
Added extra X1 clock input description.
Updated to chip only current numbers.
“Register 4” and “Pin Description” PMRXER correction. 1.10 10/9/02 Changed SMRXC and SMTXC to I/O. Input in MAC mode, output in PHY mode MII. Changed polarity of
TXP and TXM pins. “Electrical Characteristics” modified current consumption to chip only numbers.
Added description for no dropped packets in half duplex mode. Added recommended operating
conditions. Added Idle mode current consumption. Added “Selection of Isolation Transformers.”
Added 3.01kΩ resistor instructions for ISET “Pin Description.” Changed Polarity of transmit pairs in
“Pin Description.” Changed description for register 2, bit 1, in “Register Description.”
Added “Reset Tming.” Added “QoS Description.” “Register 3” changed 802.1x to 802.3x. “Register 6”
changed default column to disable flow control for pull-down, and enable flow control for pull up.
“Register 29” and “MIIM Register 0” indicate loop back is at the PHY 1.11 10/24/02 Removed caption under table in “Register 18.” Changed definition of MDI/MDIX in “Register 29,”
“Register 30,” “MIIM Register 0.” 1.12 5/20/03 Refer to 8995XA data sheet. 1.13 8/29/03 Convert to new format. December 2003 3 M9999-120403
Revision Date Summary of Changes 1.08 4/01/02 Created. 1.09 5/20/02 Changed MII setting descriptions. Changed pu/pd descriptions for SMRXD2.
Changed pu/pd description for forced flow control.
Edited large packet sizes back in, also in “Register 4.”
Added in typical supply current numbers for 100BaseTX and 10BaseTX operation.
Added in note for illegal half-duplex, force flow control.
Added extra X1 clock input description.
Updated to chip only current numbers.
“Register 4” and “Pin Description” PMRXER correction. 1.10 10/9/02 Changed SMRXC and SMTXC to I/O. Input in MAC mode, output in PHY mode MII. Changed polarity of
TXP and TXM pins. “Electrical Characteristics” modified current consumption to chip only numbers.
Added description for no dropped packets in half duplex mode. Added recommended operating
conditions. Added Idle mode current consumption. Added “Selection of Isolation Transformers.”
Added 3.01kΩ resistor instructions for ISET “Pin Description.” Changed Polarity of transmit pairs in
“Pin Description.” Changed description for register 2, bit 1, in “Register Description.”
Added “Reset Tming.” Added “QoS Description.” “Register 3” changed 802.1x to 802.3x. “Register 6”
changed default column to disable flow control for pull-down, and enable flow control for pull up.
“Register 29” and “MIIM Register 0” indicate loop back is at the PHY 1.11 10/24/02 Removed caption under table in “Register 18.” Changed definition of MDI/MDIX in “Register 29,”
“Register 30,” “MIIM Register 0.” 1.12 5/20/03 Refer to 8995XA data sheet. 1.13 8/29/03 Convert to new format. December 2003 3 M9999-120403