Datasheet OPA196, OPA2196, OPA4196 - OPAx196 (Texas Instruments) - 5

FabricanteTexas Instruments
Descripción36-V, Low-Power, Low Offset Voltage, Rail-to-Rail Operational Amplifier
Páginas / Página49 / 5 — OPA196. , OPA2196. , OPA4196. www.ti.com. 6 Specifications. 6.1 Absolute …
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OPA196. , OPA2196. , OPA4196. www.ti.com. 6 Specifications. 6.1 Absolute Maximum Ratings. MIN. MAX. UNIT. 6.2 ESD Ratings. VALUE

OPA196 , OPA2196 , OPA4196 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings MIN MAX UNIT 6.2 ESD Ratings VALUE

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OPA196 , OPA2196 , OPA4196 www.ti.com
SBOS869 – JULY 2017
6 Specifications 6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
±20 Supply voltage, VS = (V+) – (V–) V (+40, single supply) Common-mode (V–) – 0.5 (V+) + 0.5 Voltage V Signal input pins Differential (V+) – (V–) + 0.2 Current ±10 mA Output short circuit(2) Continuous Continuous Continuous Operating –40 150 Temperature Junction 150 °C Storage, Tstg –65 150 (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Short-circuit to ground, one amplifier per package.
6.2 ESD Ratings VALUE UNIT
Electrostatic V(ESD) OPAx196 Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±3000 V discharge OPA196 ±1000 V Electrostatic Charged-device model (CDM), per JEDEC specification JESD22- V(ESD) OPA2196 ±500 V discharge C101(2) OPA4196 ±500 V (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage, VS = (V+) – (V–) 4.5 (±2.25) 36 (±18) V Specified temperature –40 125 °C
6.4 Thermal Information: OPA196 OPA196 8 PINS 5 PINS THERMAL METRIC(1) UNIT DGK D (SOIC) DBV (SOT) (VSSOP)
RθJA Junction-to-ambient thermal resistance 115.8 180.4 158.8 °C/W RθJC(top) Junction-to-case(top) thermal resistance 60.1 67.9 60.7 °C/W RθJB Junction-to-board thermal resistance 56.4 102.1 44.8 °C/W ψJT Junction-to-top characterization parameter 12.8 10.4 1.6 °C/W ψJB Junction-to-board characterization parameter 55.9 100.3 4.2 °C/W RθJC(bot) Junction-to-case(bottom) thermal resistance N/A N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: OPA196 OPA2196 OPA4196 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information: OPA196 6.5 Thermal Information: OPA2196 6.6 Thermal Information: OPA4196 6.7 Electrical Characteristics: VS = ±4 V to ±18 V (VS = 8 V to 36 V) 6.8 Electrical Characteristics: VS = ±2.25 V to ±4 V (VS = 4.5 V to 8 V) 6.9 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Input Protection Circuitry 7.3.2 EMI Rejection 7.3.3 Phase Reversal Protection 7.3.4 Thermal Protection 7.3.5 Capacitive Load and Stability 7.3.6 Common-Mode Voltage Range 7.3.7 Electrical Overstress 7.3.8 Overload Recovery 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Typical Applications 8.2.1 Low-side Current Measurement 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curves 8.2.2 16-Bit Precision Multiplexed Data-Acquisition System 8.2.2.1 Design Requirements 8.2.2.2 Detailed Design Procedure 8.2.3 Slew Rate Limit for Input Protection 9 Power-Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.1.1.1 TINA-TI (Free Software Download) 11.1.1.2 TI Precision Designs 11.2 Documentation Support 11.2.1 Related Documentation 11.3 Related Links 11.4 Receiving Notification of Documentation Updates 11.5 Community Resources 11.6 Trademarks 11.7 Electrostatic Discharge Caution 11.8 Glossary 12 Mechanical, Packaging, and Orderable Information