Preliminary Datasheet ADAR1000 (Analog Devices) - 4

FabricanteAnalog Devices
Descripción4 Channel X/Ku Band Beamformer
Páginas / Página51 / 4 — ADAR1000. Preliminary Technical Data. Parameter. Min. Typ. Max. Meas. …
RevisiónPrF
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ADAR1000. Preliminary Technical Data. Parameter. Min. Typ. Max. Meas. Unit. Condition

ADAR1000 Preliminary Technical Data Parameter Min Typ Max Meas Unit Condition

Versión de texto del documento

ADAR1000 Preliminary Technical Data Parameter Min Typ. Max Meas. Unit Condition
Un-calibrated 5 < 2.5 O Noise Figure 11 9 dB max gain Channel to Channel Isolation 30 > 40 dB RF_IO to RX Isolation 36 > 70 dB Input Return Loss -10 -9 dB Output Return Loss -10 -12 dB RF_IO pin TEMPERATURE SENSOR Range -40 85 -40 to OC +85 Scale 0.8 OC/lsb Offset -85 OC Accuracy TBD OC Die temperature measured; compared to nominal straight line2 Number of Bits 8 T/R SECTION T/R Switching Time 50 80 ns Phase and Gain Switching Time 100 <30 ns Referenced to TX_LOAD or RX_LOAD T/R Control Output Voltage AVDD1 0 V POWER DETECTOR Range -20 10 -20 to dBm +10 Accuracy 2 dB Number of Bits 8 PA DAC Number of Bits 8 Voltage Range -4.8 0 V Output Current -10 10 -10 to mA 10 Noise 280 nV/√Hz ON to OFF Switching Time 150 ns 1V ON-to-OFF swing, 1 nF load capacitance LNA DAC Number of Bits 8 bits Voltage Range -4.8 Open 0 V Output Current -10 10 -10 to mA 10 Noise 280 nV/√Hz ON to OFF Switching Time 150 ns 1V ON-to-OFF swing, 1 nF load capacitance SWITCH OUTPUTS TR_SW_POS, TR_SW_NEG, TR_POL, CLoad = 1 nF Switching Time (OFF to ON) TBD ns 10 – 90 % Switching Time (ON to OFF) TBD ns 90 – 10 % Switching Delay (TR – switch) TBD ns 50 % - 50 % LOGIC INPUTS (1.8 V logic levels) VIH, Input High Voltage 1.0 2.0 V VIL, Input Low Voltage - 0.2 0.3 V IINH, IINL, Input Current ±1 µA CIN, Input Capacitance 10 pF Rev. PrF | Page 4 of 51 Document Outline Features Applications General Description Functional Block Diagram Specifications Timing Specifications Timing Diagram SPI Block Write Mode Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Changes from Previous Silicon Revision T/R switch driver output External PA and LNA bias DACs Eliminated the -3.3V supply input to the chip New PA_ON input pin Applications Gain Control Registers Switched Attenuator Control TR_SW_POS and TR_SW_NEG (T/R Switch Control) TX/RX Subcircuit Control TR_SOURCE = 0 SPI Programming Example Register Maps Address: 0x000, Reset: 0x00, Name: INTERFACE_CONFIG_A Outline Dimensions