Datasheet ADuM6400, ADuM6401, ADuM6402, ADuM6403, ADuM6404 (Analog Devices) - 5

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Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
Typical specifications are at TA = 25°C, VDD1 = VISO = 3.3 V, VSEL = GNDISO. Minimum/maximum specifications apply over the entire recommended operation range, which is 3.0 V ≤ VDD1, VSEL, VISO ≤ 3.6 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 6. DC-to-DC Converter Static Specifications Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC-TO-DC CONVERTER SUPPLY Setpoint VISO 3.0 3.3 3.6 V IISO = 0 mA Line Regulation VISO(LINE) 1 mV/V IISO = 20 mA, VDD1 = 3.0 V to 3.6 V Load Regulation VISO(LOAD) 1 5 % IISO = 4 mA to 36 mA Output Ripple VISO(RIP) 50 mV p-p 20 MHz bandwidth, CBO = 0.1 μF||10 μF, IISO = 54 mA Output Noise VISO(NOISE) 130 mV p-p CBO = 0.1 μF||10 μF, IISO = 54 mA Switching Frequency fOSC 180 MHz PWM Frequency fPWM 625 kHz Output Supply Current IISO(MAX) 40 mA VISO > 3 V Efficiency at IISO(MAX) 33 % IISO = 40 mA IDD1, No VISO Load IDD1(Q) 15 28 mA IDD1, Full VISO Load IDD1(MAX) 175 mA
Table 7. DC-to-DC Converter Dynamic Specifications 1 Mbps—A or C Grade 25 Mbps—C Grade Test Conditions/ Parameter Symbol Min Typ Max Min Typ Ma Unit x Comments
SUPPLY CURRENT Input IDD1(D) ADuM6400 8 41 mA No VISO load ADuM6401 8 44 mA No VISO load ADuM6402 8 46 mA No VISO load ADuM6403 9 47 mA No VISO load ADuM6404 9 51 mA No VISO load Available to Load IISO(LOAD) ADuM6400 40 33 mA ADuM6401 40 31 mA ADuM6402 40 30 mA ADuM6403 40 29 mA ADuM6404 40 28 mA
Table 8. Switching Specifications A Grade C Grade Test Conditions/ Parameter Symbol Min Typ Max Min Typ Ma Unit x Comments
SWITCHING SPECIFICATIONS Data Rate 1 25 Mbps Within PWD limit Propagation Delay tPHL, tPLH 60 100 45 65 ns 50% input to 50% output Pulse Width Distortion PWD 40 6 ns |tPLH − tPHL| Change vs. Temperature 5 ps/°C Pulse Width PW 1000 40 ns Within PWD limit Propagation Delay Skew tPSK 50 45 ns Between any two units Channel Matching Codirectional1 tPSKCD 50 6 ns Opposing Directional2 tPSKOD 50 15 ns 1 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation 7 barrier. 2 Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrier. Rev. A | Page 5 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY PACKAGE CHARACTERISTICS REGULATORY INFORMATION INSULATION AND SAFETY-RELATED SPECIFICATIONS INSULATION CHARACTERISTICS IEC 60747-5-2 (VDE 0884 Part 2):2003-01 and DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 Thermal Derating Curve RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TRUTH TABLE TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY APPLICATIONS INFORMATION PCB LAYOUT START-UP BEHAVIOR EMI CONSIDERATIONS PROPAGATION DELAY PARAMETERS DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY POWER CONSUMPTION CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION POWER CONSIDERATIONS THERMAL ANALYSIS INSULATION LIFETIME OUTLINE DIMENSIONS ORDERING GUIDE