Datasheet LT3650-8.2, LT3650-8.4 (Analog Devices) - 17

LT3650-8.2/LT3650-8.4
applicaTions inForMaTion Layout Considerations
effectively steer these high currents such that the battery The LT3650 switch node has rise and fall times that are reference does not get corrupted. Figure 9 illustrates an typically less than 10ns to maximize conversion efficiency. effective grounding scheme using component placement The switched node (Pin SW) trace should be kept as short to control ground currents. When the switch is enabled as possible to minimize high frequency noise. The input (loop #1), current flows from the input bypass capacitor capacitor (C (CIN) through the switch and inductor to the battery posi- IN) should be placed close to the IC to minimize this switching noise. Short, wide traces on these nodes tive terminal. When the switch is disabled (loop #2), the also help to avoid voltage stress from inductive ringing. current to the battery positive terminal is provided from The BOOST decoupling capacitor should also be in close ground through the freewheeling Schottky diode (DF). In proximity to the IC to minimize inductive ringing. The both cases, these switched currents return to ground via SENSE and BAT traces should be routed together and the output bypass capacitor (CBAT). kept as short as possible. Shielding these signals from The LT3650 packaging has been designed to efficiently switching noise with ground is recommended. remove heat from the IC via the exposed pad on the High current paths and transients should be kept iso- backside of the package, which is soldered to a copper lated from battery ground, to assure an accurate output footprint on the PCB. This footprint should be made as voltage reference. Effective grounding can be achieved large as possible to reduce the thermal resistance of the by considering switched current in the ground plane, IC case to ambient air. and careful component placement and orientation can CIN CBAT VBAT RSENSE 1 2 DF + LT3650 VIN SW SENSE BAT 365082 F09
Figure 9. Component Orientation Isolates High Current Paths From Sensitive Nodes
36508284fd 17 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts