Datasheet LT8697 (Analog Devices) - 13

LT8697
APPLICATIONS INFORMATION Cable Drop Compensation
of the LT8697’s output. If RCDC is changed, CCDC should The LT8697 includes the necessary circuitry to implement also be changed to maintain roughly the same 10µs RC cable drop compensation. Cable drop compensation allows time constant. If the capacitance across the remote load the regulator to maintain 5V regulation on the USB V is large compared to the LT8697 output capacitor tied to LOAD despite high cable resistance. The LT8697 increases its the SYS pin, a longer RCDC • CCDC time constant may be local output voltage V necessary for stability depending on the amount of cable OUT above 5V as the load increases to keep V drop compensation used. Output stability should always LOAD regulated to 5V. This compensation does not require running an additional pair of Kelvin sense be verified in the end application circuit. wires from the regulator to the load, but does require the The LT8697 limits the maximum voltage of VOUT by system designer to know the cable resistance RCABLE as limiting the voltage on the SYS pin VSYS to 5.8V. If the the LT8697 does not sense this value. cable drop compensation is programmed to compensate Program the cable drop compensation using the follow- for more than 0.8V of cable drop at the maximum ILOAD, ing ratio: this VSYS maximum will prevent VOUT from rising higher and the voltage at the point of load will drop below 5V. R R SENSE • RCDC The following equation shows how to derive the LT8697 CBL = 20.55 • RCABLE output voltage VOUT: where RCDC is a resistor tied between the regulator output VOUT = 5V+ 20.55 •ILOAD•RSENSE •RCDC and the USB5V pin, R R CBL is a resistor tied between the CBL RCBL pin and GND, RSENSE is the sense resistor tied be- tween the ISP and ISN pins in series between the regulator As stated earlier, the LT8697’s cable drop compensation output and the load, and R feature does not allow VOUT to exceed the SYS regula- CABLE is the cable resistance. R tion point of 5.8V. If additional impedance is placed in SENSE is typically chosen based on the desired current limit and is typically 20mΩ for 2.1A systems and 50mΩ between the SYS pin and the OUT node such as RSENSE for 0.9A. See the Setting the Current Limit section for or a USB Switch, the voltage drop through these imped- more information. ances at the maximum ILOAD must also be factored in to this maximum allowable VOUT value. Refer to Figure 1 The current flowing into the USB5V pin through RCDC is for load lines of VOUT and VLOAD to see how cable drop identical to the current flowing out of the RCBL resistor. compensation works. While the ratio of these two resistors should be chosen per the equation above, choose the absolute values of these 6.0 R resistors to keep this current between 30µA and 200µA at CABLE = 0.3Ω RSENSE = 20mΩ 5.8 full load current. This restriction results in R RCDC = 10kΩ CBL and RCDC RCBL = 13.7kΩ values between 5k and 33k. If IUSB5V is too low, capacitive 5.6 loading on the USB5V and RCBL pins will degrade the load VOUT step transient performance of the regulator. If I 5.4 USB5V is too high, the RCBL pin will go into current limit and the VOLTAGE (V) 5.2 cable drop compensation feature will not work. VLOAD 5.0 Capacitance across the remote load to ground downstream of RSENSE forms a zero in the LT8697’s feedback loop 4.8 0 0.5 1 1.5 2 2.5 3 due to cable drop compensation. CCDC reduces the cable LOAD CURRENT (A) drop compensation gain at high frequency. The 1nF CCDC 8697 F01 capacitor tied across the 10k RCDC is required for stability
Figure 1. Cable Drop Compensation Load Line
8697fb For more information www.linear.com/LT8697 13 Document Outline Features Applications Typical Application Absolute Maximum Ratings Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts