Datasheet ADP2147 (Analog Devices) - 4

FabricanteAnalog Devices
DescripciónCompact, 800 mA, 3 MHz, Simple DVS, Buck Regulator
Páginas / Página16 / 4 — ADP2147. ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating. THERMAL …
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Idioma del documentoInglés

ADP2147. ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating. THERMAL DATA. THERMAL RESISTANCE. Table 4. Thermal Resistance

ADP2147 ABSOLUTE MAXIMUM RATINGS Table 3 Parameter Rating THERMAL DATA THERMAL RESISTANCE Table 4 Thermal Resistance

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ADP2147 ABSOLUTE MAXIMUM RATINGS Table 3.
Junction-to-ambient thermal resistance (θJA) of the package is based on modeling and calculation using a 4-layer board. The
Parameter Rating
junction-to-ambient thermal resistance is highly dependent on VIN, EN, VSEL −0.4 V to +6.5 V the application and board layout. In applications where high VOUT, SW to GND −1.0 V to (VIN + 0.2 V) maximum power dissipation exists, close attention to thermal Temperature Range board design is required. The value of θ Operating Ambient −40°C to +85°C JA may vary, depending on PCB material, layout, and environmental conditions. The specified Operating Junction −40°C to +125°C values of θJA are based on a 4-layer, 4 in. × 3 in. circuit board. Refer Storage Temperature −65°C to +150°C to JEDEC JESD 51-9 for detailed information pertaining to board Lead Temperature Range −65°C to +150°C construction. For additional information, see the AN-617 Soldering (10 sec) 300°C Application Note, MicroCSP™ Wafer Level Chip Scale Package. Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C ΨJB is the junction-to-board thermal characterization parameter measured in units of °C/W. The package Ψ ESD Model JB is based on modeling and calculation using a 4-layer board. The JESD51-12, Guidelines Human Body ±1500 V for Reporting and Using Package Thermal Information, states that Charged Device ±500 V thermal characterization parameters are not the same as thermal Machine ±100 V resistances. ΨJB measures the component power flowing through multiple thermal paths rather than through a single path, which Stresses above those listed under Absolute Maximum Ratings is the procedure for measuring thermal resistance, θJB. There- may cause permanent damage to the device. These are stress fore, ΨJB thermal paths include convection from the top of the rating only; functional operation of the device at these or any package as well as radiation from the package, factors that make other conditions above those indicated in the operational ΨJB more useful in real-world applications than θJB. Maximum section of this specification is not implied. Exposure to absolute junction temperature (TJ) is calculated from the board temperature maximum rating conditions for extended periods may affect (TB) and power dissipation (PD) using the formula: device reliability. TJ = TB + (PD × ΨJB)
THERMAL DATA
Refer to JEDEC JESD51-8 and JESD51-12 for more detailed Absolute maximum ratings apply individually only, not in information about ΨJB. combination.
THERMAL RESISTANCE
The ADP2147 can be damaged if the junction temperature limit is exceeded. Monitoring ambient temperature does not guarantee θJA and ΨJB are specified for the worst-case conditions, that is, a that the junction temperature (T device soldered in a circuit board for surface-mount packages. J) is within the specified temperature limit. In applications with high power dissipation
Table 4. Thermal Resistance
and poor thermal resistance, the maximum ambient temperature
Package Type θJA ΨJB Unit
may need to be derated. In applications with moderate power 6-Ball WLCSP 170 80 °C/W dissipation and low printed circuit board (PCB) thermal resistance, the maximum ambient temperature can exceed the maximum limit if the junction temperature is within specification
ESD CAUTION
limits. The junction temperature (TJ) of the device is dependent on the ambient temperature (TA), the power dissipation of the device (PD), and the junction-to-ambient thermal resistance of the package (θJA). Maximum junction temperature (TJ) is calculated from the ambient temperature (T A) and power dissipation (PD) using the following formula: TJ = TA + (PD × θJA) Rev. 0 | Page 4 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATIONS CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONTROL SCHEME PWM MODE POWER SAVE MODE Power Save Mode Current Threshold ENABLE/SHUTDOWN SIMPLE DYNAMIC VOLTAGE SCALING (DVS) SHORT-CIRCUIT PROTECTION UNDERVOLTAGE LOCKOUT THERMAL PROTECTION SOFT START CURRENT LIMIT 100% DUTY OPERATION APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION Inductor Output Capacitor THERMAL CONSIDERATIONS PCB LAYOUT GUIDELINES EVALUATION BOARD EVALUATION BOARD LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE