Datasheet ADP2119, ADP2120 (Analog Devices) - 3

FabricanteAnalog Devices
Descripción1.25A, 1.2MHz Synchronous Step-Down DC-to-DC Regulator
Páginas / Página24 / 3 — Data Sheet. ADP2119/ADP2120. SPECIFICATIONS. Table 1. Parameter. Symbol. …
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Data Sheet. ADP2119/ADP2120. SPECIFICATIONS. Table 1. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit

Data Sheet ADP2119/ADP2120 SPECIFICATIONS Table 1 Parameter Symbol Test Conditions/Comments Min Typ Max Unit

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Data Sheet ADP2119/ADP2120 SPECIFICATIONS
VIN = VPVIN = 3.3 V, EN = VIN, SYNC/MODE = VIN at TJ = −40°C to +125°C, unless otherwise noted.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
VIN and PVIN VIN Voltage Range V 2.3 5.5 V IN PVIN Voltage Range V 2.3 5.5 V PVIN Quiescent Current I No switching, SYNC/MODE = GND 150 200 µA VIN Switching, no load, SYNC/MODE = VIN 680 900 µA Shutdown Current I V = V = 5.5 V, EN = GND 0.3 2 µA SHDN IN PVIN VIN Undervoltage Lockout Threshold UVLO V rising 2.2 2.3 V IN V falling 2 2.1 V IN OUTPUT CHARACTERISTICS Load Regulation1 ADP2119, I = 0 A to 2 A 0.08 %/A O Load Regulation2 ADP2120, I = 0 A to 1.25 A 0.08 %/A O Line Regulation1 ADP2119, I = 1 A 0.05 %/V O Line Regulation2 ADP2120, I = 1 A 0.05 %/V O FB FB Regulation Voltage V V = 2.3 V to 5.5 V 0.591 0.6 0.609 V FB IN FB Bias Current I V = 2.3 V to 5.5 V 0.01 0.1 µA FB IN SW High-Side On Resistance3 V = V = 3.3 V, I = 200 mA 145 190 mΩ IN PVIN SW Low-Side On Resistance3 V = V = 3.3 V, I = 200 mA 70 100 mΩ IN PVIN SW SW Peak Current Limit High-side switch, V = V = 3.3 V (ADP2119) 2.5 3 3.5 A IN PVIN High-side switch, V = V = 3.3 V (ADP2120) 1.6 2 2.4 A IN PVIN SW Maximum Duty Cycle V = V = 5.5 V, full frequency 100 % IN PVIN SW Minimum On Time4 V = V = 5.5 V, full frequency 100 ns IN PVIN TRK TRK Input Voltage Range 0 600 mV TRK-to-FB Offset Voltage TRK = 0 mV to 500 mV −15 +15 mV TRK Input Bias Current 100 nA FREQUENCY Oscillator Frequency f 1.02 1.2 1.38 MHz S SYNC/MODE Synchronization Range 1 2 MHz SYNC Minimum Pulse Width 100 ns SYNC Minimum Off Time 100 ns SYNC Input High Voltage 1.3 V SYNC Input Low Voltage 0.4 V INTEGRATED SOFT START Soft Start Time All switching frequencies 1024 Clock cycles f = 1.2 MHz 853 µs S PGOOD Power-Good Range FB rising threshold 105 110 115 % FB rising hysteresis 2.5 % FB falling threshold 85 90 95 % FB falling hysteresis 2.5 % Power-Good Deglitch Time From FB to PGOOD 16 Clock cycles PGOOD Leakage Current V = 5 V 0.1 1 µA PGOOD PGOOD Output Low Voltage I = 1 mA 150 200 mV PGOOD PGOOD Output Low Resistor I = 1 mA 150 200 Ω PGOOD Rev. A | Page 3 of 24 Document Outline Features Applications Typical Application Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance Boundary Condition ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme PWM Mode Operation PFM Mode Operation Slope Compensation Enable/Shutdown Integrated Soft Start Tracking Oscillator and Synchronization Current Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Power Good (PGOOD) Applications Information ADIsimPower Design Tool Output Voltage Selection Inductor Selection Output Capacitor Selection Input Capacitor Selection Voltage Tracking Typical Application Circuits Outline Dimensions Ordering Guide