Datasheet LTC3617 (Analog Devices)

FabricanteAnalog Devices
Descripción±6A Monolithic Synchronous Step-Down Regulator for DDR Termination
Páginas / Página20 / 1 — Features. Description. 6A Output Current. 2.25V to 5.5V Input Voltage …
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Features. Description. 6A Output Current. 2.25V to 5.5V Input Voltage Range. ±10mV Output Voltage Accuracy

Datasheet LTC3617 Analog Devices

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LTC3617 ±6A Monolithic Synchronous Step-Down Regulator for DDR Termination
Features Description
n ±
6A Output Current
The LTC®3617 is a high efficiency monolithic synchronous n
2.25V to 5.5V Input Voltage Range
buck regulator utilizing a current mode, constant frequency n
±10mV Output Voltage Accuracy
architecture. It operates from an input voltage range of n
Optimized for Low Output Voltages Down to 0.5V
2.25V to 5.5V and provides a regulated output voltage n
High Efficiency
equal to 0.5 • VDDQIN while sourcing and sinking up to n Integrated Buffer for VTTR = VDDQIN • 0.5 6A of load current. An internal amplifier provides a VTTR n Shutdown Current: <1µA output voltage equal to 0.5 • VDDQIN with an output cur- n Adjustable Switching Frequency: Up to 4MHz rent capability of ±10mA. n Optional Internal Compensation The operating frequency is externally programmable up to n Internal Soft-Start 4MHz, allowing the use of small surface mount inductors. n Power Good Status Output For switching-noise-sensitive applications, the LTC3617 n Input Overvoltage Protected can be synchronized to an external clock up to 4MHz. n Thermally Enhanced 24-Pin 3mm × 5mm QFN Package Forced continuous mode operation in the LTC3617 reduces noise and RF interference. Adjustable external compensa-
applications
tion allows the transient response to be optimized over a wide range of loads and output capacitors. n DDR Termination The internal synchronous switch increases efficiency and n Supports DDR, DDR2 and DDR3 Standards eliminates the need for an external catch diode, minimizing n Tracking Supplies external component count and board space. The LTC3617 is offered in a leadless 24-pin 3mm × 5mm thermally enhanced QFN package. L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 6580258, 5481178, 6498466, 6611131.
typical application Efficiency and Power Loss vs Load Current
100 10 VIN 2.5V 22µF 90 SV ×4 IN PVIN 80 VREF RUN VTTR 1.25V 70 POWER LOSS (W) VDDQIN ±10mA 1 0.1µF RT 60 LTC3617 0.15µH VTT 50 SW 1.25V PGOOD SGND ±6A 40 47µF EFFICIENCY (%) ×2 0.1 ITH PGND 30 SYNC VFB 20 3617 TA01a 10 0 0.01 0.1 1 10 LOAD CURRENT (A) 3617 TA01b 3617fa 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts