Datasheet LTC3736-2 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | Dual 2-Phase, No RSENSE , Synchronous Controller with Output Tracking |
| Páginas / Página | 28 / 7 — PIN FUNCTIONS (QFN/SSOP Package). SW1/SW2 (Pins 22, 10/Pins 1, 13):. … |
| Formato / tamaño de archivo | PDF / 357 Kb |
| Idioma del documento | Inglés |
PIN FUNCTIONS (QFN/SSOP Package). SW1/SW2 (Pins 22, 10/Pins 1, 13):. IPRG1/IPRG2 (Pins 23, 2/Pins 2, 5):
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LTC3736-2
PIN FUNCTIONS (QFN/SSOP Package)
select. For auxiliary winding applications, connect to a
SW1/SW2 (Pins 22, 10/Pins 1, 13):
Switch Node Con- resistor divider from the auxiliary output. To synchronize nection to Inductor. Also the negative input to differential with an external clock using the PLL, apply a CMOS compat- peak current comparator and an input to the reverse cur- ible clock with a frequency between 250kHz and 850kHz. rent comparator. Normally connected to the drain of the To select pulse-skipping operation at light loads, tie this external P-channel MOSFETs, the drain of the external pin to VIN. Grounding this pin selects forced continuous N-channel MOSFET, and the inductor. operation, which allows the inductor current to reverse.
IPRG1/IPRG2 (Pins 23, 2/Pins 2, 5):
Three-State Pins to When synchronized to an external clock, pulse-skipping Select Maximum Peak Sense Voltage Threshold. These operation is enabled at light loads. pins select the maximum allowed voltage drop between
BG1/BG2 (Pins 19, 13/Pins 22, 16):
Bottom (NMOS) Gate the SENSE+ and SW pins (i.e., the maximum allowed drop Drive Output. These pins drive the gates of the external across the external P-channel MOSFET) for each channel. N-channel MOSFETs. These pins have an output swing Tie to VIN, GND or fl oat to select 345mV, 167mV, or 240mV, from PGND to SENSE+. respectively.
SENSE1+/SENSE2+ (Pins 21, 11/Pins 24, 14):
Positive
VFB1/VFB2 (Pins 24, 7/Pins 3, 10):
Feedback Pins. Re- Input to Differential Current Comparator. Also powers ceives the remotely sensed feedback voltage for its con- the gate drivers. Normally connected to the source of the troller from an external resistor divider across the output. external P-channel MOSFET.
FUNCTIONAL DIAGRAM (Common Circuitry)
RVIN VIN (TO CONTROLLER 1, 2) VIN CVIN UNDERVOLTAGE VOLTAGE LOCKOUT REFERENCE 0.6V VREF 0.7μA SHDN RUN/SS tSEC = 1ms + INTSS EXTSS – SYNC/FCB PHASE SYNC DETECT DETECTOR PLLLPF CLK1 SLOPE1 VOLTAGE CONTROLLED SLOPE OSCILLATOR CLK2 COMP SLOPE2 – – VFB1 UV1 PGOOD FCB FCB OV1 + + SHDN 0.6V 0.54V + UV2 OV2 37362 FD VFB2 – 37362fb 7
PIN FUNCTIONS (QFN/SSOP Package)
select. For auxiliary winding applications, connect to a
SW1/SW2 (Pins 22, 10/Pins 1, 13):
Switch Node Con- resistor divider from the auxiliary output. To synchronize nection to Inductor. Also the negative input to differential with an external clock using the PLL, apply a CMOS compat- peak current comparator and an input to the reverse cur- ible clock with a frequency between 250kHz and 850kHz. rent comparator. Normally connected to the drain of the To select pulse-skipping operation at light loads, tie this external P-channel MOSFETs, the drain of the external pin to VIN. Grounding this pin selects forced continuous N-channel MOSFET, and the inductor. operation, which allows the inductor current to reverse.
IPRG1/IPRG2 (Pins 23, 2/Pins 2, 5):
Three-State Pins to When synchronized to an external clock, pulse-skipping Select Maximum Peak Sense Voltage Threshold. These operation is enabled at light loads. pins select the maximum allowed voltage drop between
BG1/BG2 (Pins 19, 13/Pins 22, 16):
Bottom (NMOS) Gate the SENSE+ and SW pins (i.e., the maximum allowed drop Drive Output. These pins drive the gates of the external across the external P-channel MOSFET) for each channel. N-channel MOSFETs. These pins have an output swing Tie to VIN, GND or fl oat to select 345mV, 167mV, or 240mV, from PGND to SENSE+. respectively.
SENSE1+/SENSE2+ (Pins 21, 11/Pins 24, 14):
Positive
VFB1/VFB2 (Pins 24, 7/Pins 3, 10):
Feedback Pins. Re- Input to Differential Current Comparator. Also powers ceives the remotely sensed feedback voltage for its con- the gate drivers. Normally connected to the source of the troller from an external resistor divider across the output. external P-channel MOSFET.
FUNCTIONAL DIAGRAM (Common Circuitry)
RVIN VIN (TO CONTROLLER 1, 2) VIN CVIN UNDERVOLTAGE VOLTAGE LOCKOUT REFERENCE 0.6V VREF 0.7μA SHDN RUN/SS tSEC = 1ms + INTSS EXTSS – SYNC/FCB PHASE SYNC DETECT DETECTOR PLLLPF CLK1 SLOPE1 VOLTAGE CONTROLLED SLOPE OSCILLATOR CLK2 COMP SLOPE2 – – VFB1 UV1 PGOOD FCB FCB OV1 + + SHDN 0.6V 0.54V + UV2 OV2 37362 FD VFB2 – 37362fb 7