Datasheet ADAU1401A (Analog Devices)

FabricanteAnalog Devices
DescripciónSigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
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SigmaDSP 28-/56-Bit Audio Processor. with Two ADCs and Four DACs. ADAU1401A. FEATURES. GENERAL DESCRIPTION

Datasheet ADAU1401A Analog Devices, Revisión: A

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SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs ADAU1401A FEATURES GENERAL DESCRIPTION 28-/56-bit, 50 MIPS digital audio processor
The ADAU1401A is a complete, single-chip audio system with
2 ADCs: SNR of 100 dB, THD + N of −83 dB
28-/56-bit audio DSP, ADCs, DACs, and microcontroller-like
4 DACs: SNR of 104 dB, THD + N of −90 dB
control interfaces. Signal processing includes equalization, cross-
Complete standalone operation
over, bass enhancement, multiband dynamics processing, delay
Self-boot from serial EEPROM
compensation, speaker compensation, and stereo image widening.
Auxiliary ADC with 4-input mux for analog control
This processing can be used to compensate for real-world limita-
GPIOs for digital controls and outputs
tions of speakers, amplifiers, and listening environments, providing
Fully programmable with SigmaStudio graphical tool
dramatic improvements in perceived audio quality.
28-bit × 28-bit multiplier with 56-bit accumulator for full
The signal processing of the ADAU1401A is comparable to that
double-precision processing
found in high end studio equipment. Most processing is done in
Clock oscillator for generating master clock from crystal
full 56-bit, double-precision mode, resulting in very good low
PLL for generating master clock from 64 × fS, 256 × fS,
level signal performance. The ADAU1401A is a fully program-
384 × fS, or 512 × fS clocks
mable DSP. The easy to use SigmaStudio™ software allows the
Flexible serial data input/output ports with I2S-compatible,
user to graphically configure a custom signal processing flow
left-justified, right-justified, and TDM modes
using blocks such as biquad filters, dynamics processors, level
Sampling rates of up to 192 kHz supported
controls, and GPIO interface controls.
On-chip voltage regulator for compatibility with 3.3 V systems 48-lead, plastic LQFP
The ADAU1401A programs can be loaded on power-up either
Qualified for automotive applications
from a serial EEPROM through its own self-boot mechanism or from an external microcontroller. On power-down, the current
APPLICATIONS
state of the parameters can be written back to the EEPROM from
Multimedia speaker systems
the ADAU1401A to be recalled the next time the program is run.
MP3 player speaker docks
Two Σ-Δ ADCs and four Σ-Δ DACs provide a 98.5 dB analog
Automotive head units
input to analog output dynamic. Each ADC has a THD + N of
Minicomponent stereos
−83 dB, and each DAC has a THD + N of −90 dB. Digital input
Digital televisions
and output ports allow a glueless connection to additional ADCs
Studio monitors
and DACs. The ADAU1401A communicates through an I2C® bus
Speaker crossovers
or a 4-wire SPI port.
Musical instrument effects processors In-seat sound systems (aircraft/motor coaches) FUNCTIONAL BLOCK DIAGRAM DIGITAL VDD DIGITAL GROUND ANALOG VDD ANALOG PLL MODE PLL LOOP CRYSTAL GROUND FILTER 3.3V 3 3 3 2 3 2 1.8V ADAU1401A PLL CLOCK OSCILLATOR REGULATOR FILTD/CM 2-CHANNEL 2 ANALOG STEREO INPUT ADC DAC 4-CHANNEL 28-/56-BIT, 50MIPS FILTA/ ANALOG ADC_RES OUTPUT 2 AUDIO PROCESSOR CORE, 40ms DELAY MEMORY DAC RESET/ CONTROL INTERFACE 8-CHANNEL 8-BIT AUX GPIO 8-CHANNEL MODE AND SELF-BOOT DIGITAL INPUT ADC DIGITAL OUTPUT SELECT INPUT/OUTPUT MATRIX 5 3 3 3
001 6-
RESET SELF-BOOT I2C/SPI AND WRITEBACK DIGITAL IN OR GPIO AUX ADC OR GPIO DIGITAL OUT OR GPIO
0850 Figure 1.
Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved.
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ANALOG PERFORMANCE DIGITAL INPUT/OUTPUT POWER TEMPERATURE RANGE PLL AND OSCILLATOR REGULATOR DIGITAL TIMING SPECIFICATIONS Digital Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS SYSTEM BLOCK DIAGRAM THEORY OF OPERATION INITIALIZATION POWER-UP SEQUENCE CONTROL REGISTERS SETUP DSP Core Control Register (Address 2076) DAC Setup Register (Address 2087) RECOMMENDED PROGRAM/PARAMETER LOADING PROCEDURE POWER REDUCTION MODES USING THE OSCILLATOR SETTING MASTER CLOCK/PLL MODE VOLTAGE REGULATOR AUDIO ADCs AUDIO DACs CONTROL PORTS I2C PORT Addressing I2C Read and Write Operations SPI PORT Chip Address, R/ Subaddress Data Bytes SELF-BOOT EEPROM Format Writeback SIGNAL PROCESSING NUMERIC FORMATS Numerical Format: 5.23 PROGRAMMING RAMS AND REGISTERS ADDRESS MAPS PARAMETER RAM Direct Read/Write Safeload Write DATA RAM READ/WRITE DATA FORMATS CONTROL REGISTER MAP CONTROL REGISTER DETAILS ADDRESS 2048 TO ADDRESS 2055 (0x0800 TO 0x0807)—INTERFACE REGISTERS ADDRESS 2056 (0x0808)—GPIO PIN SETTING REGISTER ADDRESS 2057 TO ADDRESS 2060 (0x0809 TO 0x080C)—AUXILIARY ADC DATA REGISTERS ADDRESS 2064 TO ADDRESS 2068 (0x0810 TO 0x0814)—SAFELOAD DATA REGISTERS ADDRESS 2069 TO ADDRESS 2073 (0x0815 TO 0x0819)—SAFELOAD ADDRESS REGISTERS ADDRESS 2074 AND ADDRESS 2075 (0x081A AND 0x081B)—DATA CAPTURE REGISTERS ADDRESS 2076 (0x081C)—DSP CORE CONTROL REGISTER ADDRESS 2078 (0x081E)—SERIAL OUTPUT CONTROL REGISTER ADDRESS 2079 (0x081F)—SERIAL INPUT CONTROL REGISTER ADDRESS 2080 AND ADDRESS 2081 (0x0820 AND 0x0821)—MULTIPURPOSE PIN CONFIGURATION REGISTERS ADDRESS 2082 (0x0822)—AUXILIARY ADC AND POWER CONTROL REGISTER ADDRESS 2084 (0x0824)—AUXILIARY ADC ENABLE REGISTER ADDRESS 2086 (0x0826)—OSCILLATOR POWER-DOWN REGISTER ADDRESS 2087 (0x0827)—DAC SETUP REGISTER MULTIPURPOSE PINS AUXILIARY ADC GENERAL-PURPOSE INPUT/OUTPUT PINS SERIAL DATA INPUT/OUTPUT PORTS LAYOUT RECOMMENDATIONS PARTS PLACEMENT GROUNDING TYPICAL APPLICATION SCHEMATICS SELF-BOOT MODE I2C CONTROL SPI CONTROL OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS