Datasheet AD4112 (Analog Devices) - 34

FabricanteAnalog Devices
DescripciónSingle Supply, 24-Bit, Sigma-Delta ADC with ±10 V and 0 mA to 20 mA Inputs
Páginas / Página58 / 34 — AD4112. Data Sheet. OPERATING MODES. CONTINUOUS CONVERSION MODE. 0x44. …
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AD4112. Data Sheet. OPERATING MODES. CONTINUOUS CONVERSION MODE. 0x44. DIN. DATA. DOUT/RDY. SCLK

AD4112 Data Sheet OPERATING MODES CONTINUOUS CONVERSION MODE 0x44 DIN DATA DOUT/RDY SCLK

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AD4112 Data Sheet OPERATING MODES
The AD4112 has a number of operating modes that can be set the DOUT/RDY pin goes high. The user can read this register from the ADC mode register and interface mode register (see additional times, if required. However, ensure that the data Table 26 and Table 27). These modes are as follows: register is not being accessed at the completion of the next Continuous conversion mode conversion. Otherwise, the new conversion word is lost. Continuous read mode When several channels are enabled, the ADC automatically Single conversion mode sequences through the enabled channels, performing one Standby mode conversion on each channel. When all the channels are Power-down mode converted, the sequence starts again with the first channel. The Calibration modes (four) channels are converted in order from the lowest enabled channel to the highest enabled channel. The data register is updated as
CONTINUOUS CONVERSION MODE
soon as each conversion is available. The RDY output pulses Continuous conversion mode is the default power-up mode. low each time a conversion is available. The user can then read The AD4112 converts continuously, and the RDY bit in the the conversion while the ADC converts the next enabled channel. status register goes low each time a conversion is complete. If CS If the DATA_STAT bit in the interface mode register is set to 1, is low, the RDY output also goes low when a conversion is the contents of the status register, along with the conversion data, complete. To read a conversion, write to the communications are output each time the data register is read. The four LSBs of register to indicate that the next operation is a read of the data the status register indicates the channel to which the conversion register. When the data-word has been read from the data register, corresponds.
CS 0x44 0x44 DIN DATA DATA DOUT/RDY SCLK
-030 16465 Figure 54. Continuous Conversion Mode Rev. 0 | Page 34 of 58 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS TIMING CHARACTERISTICS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS NOISE PERFORMANCE AND RESOLUTION THEORY OF OPERATION POWER SUPPLIES Single-Supply Operation (AVSS = DGND) DIGITAL COMMUNICATION AD4112 RESET CONFIGURATION OVERVIEW Channel Configuration Channel Registers ADC Setups Setup Configuration Registers Filter Configuration Registers Gain Registers Offset Registers ADC Mode and Interface Mode Configuration ADC Mode Register Interface Mode Register CIRCUIT DESCRIPTION MULTIPLEXER CURRENT INPUTS VOLTAGE INPUTS Fully Differential Inputs Single-Ended Inputs Adjusting Voltage Input Gain AD4112 REFERENCE Internal Reference External Reference BUFFERED REFERENCE INPUT CLOCK SOURCE Internal Oscillator External Crystal External Clock DIGITAL FILTER SINC5 + SINC1 FILTER SINC3 FILTER SINGLE CYCLE SETTLING ENHANCED 50 Hz AND 60 Hz REJECTION FILTERS OPERATING MODES CONTINUOUS CONVERSION MODE CONTINUOUS READ MODE SINGLE CONVERSION MODE STANDBY AND POWER-DOWN MODES CALIBRATION DIGITAL INTERFACE CHECKSUM PROTECTION CRC CALCULATION Polynomial Example of a Polynomial CRC Calculation—24-Bit Word: 0x654321 (Eight Command Bits and 16-Bit Data) XOR Calculation Example of an XOR Calculation—24-Bit Word: 0x654321 (Eight Command Bits and 16-Bit Data) INTEGRATED FUNCTIONS GENERAL-PURPOSE OUPUTS DELAY 16-BIT/24-BIT CONVERSIONS DOUT_RESET SYNCHRONIZATION Normal Synchronization Alternate Synchronization ERROR FLAGS ADC_ERROR CRC_ERROR REG_ERROR ERRORB Input/Output DATA_STAT IOSTRENGTH INTERNAL TEMPERATURE SENSOR APPLICATIONS INFORMATION GROUNDING AND LAYOUT REGISTER SUMMARY REGISTER DETAILS COMMUNICATIONS REGISTER STATUS REGISTER ADC MODE REGISTER INTERFACE MODE REGISTER REGISTER CHECK DATA REGISTER GPIO CONFIGURATION REGISTER ID REGISTER CHANNEL REGISTER 0 CHANNEL REGISTER 1 TO CHANNEL REGISTER 15 SETUP CONFIGURATION REGISTER 0 SETUP CONFIGURATION REGISTER 1 TO SETUP CONFIGURATION REGISTER 7 FILTER CONFIGURATION REGISTER 0 FILTER CONFIGURATION REGISTER 1 TO FILTER CONFIGURATION REGISTER 7 OFFSET REGISTER 0 OFFSET REGISTER 1 TO OFFSET REGISTER 7 GAIN REGISTER 0 GAIN REGISTER 1 TO GAIN REGISTER 7 OUTLINE DIMENSIONS ORDERING GUIDE