Datasheet MAT02 (Analog Devices) - 8

FabricanteAnalog Devices
DescripciónLow Noise, Matched Dual Monolithic Transistor
Páginas / Página12 / 8 — MAT02. FOUR-QUADRANT MULTIPLIER. OBSOLETE
RevisiónE
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MAT02. FOUR-QUADRANT MULTIPLIER. OBSOLETE

MAT02 FOUR-QUADRANT MULTIPLIER OBSOLETE

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MAT02
more troublesome because they vary with signal levels and are sumption or single-supply operation is needed. The value of multiplied by absolute temperature. At 25°C, kT/q is frequency-compensating capacitor (CO) is dependent on the approximately 26 mV and the error due to an rBEIC term will be op amp frequency response and peak collector current. Typi- rBEIC/26 mV. Using an rBE of 0.4 Ω for the MAT02 and assum- cal values for CO range from 30 pF to 300 pF. ing a collector current range of up to 200 µA, then a peak error of 0.3% could be expected for an rBEIC error term when using the MAT02. Total error is dependent on the specific application configuration (multiply, divide, square, etc.) and the required dynamic range. An obvious way to reduce ICrBE error is to re- duce the maximum collector current, but then op amp offsets and leakage currents become a limiting factor at low input lev- els. A design range of no greater than 10 µA to 1 mA is generally recommended for most nonlinear function circuits. A powerful technique for reducing error due to ICrBE is shown in Figure 4. A small voltage equal to ICrBE is applied to the transis- tor base. For this circuit: Figure 4. Compensation of Bulk Resistance Error RC rBE VB = V1 and ICrBE = V1 (10)
FOUR-QUADRANT MULTIPLIER
R2 R1 A simplified schematic for a four-quadrant log-antilog multiplier The error from rBEIC is cancelled if RC/R2 is made equal to rOUT R1. is shown in Figure 5. Similar to the previously discussed one- Since the MAT02 bulk resistance is approximately 0.39 Ω, an quadrant multiplier, the circuit makes IO = I1 I2/I3. The two RC of 3.9 Ω and R2 of 10 R1 will give good error cancellation. input currents, I1 and I2, are each offset in the positive direction. In more complex circuits, such as the circuit in Figure 3, it may This positive offset is then subtracted out at the output stage. be inconvenient to apply a compensation voltage to each indi- Assuming ideal op amps, the currents are: vidual base. A better approach is to sum all compensation to the V V V V bases of Q1. The “A” side needs a base voltage of (V X R Y R O/RO + VZ/ I = + , I = + 1 R R 2 R R R 1 2 1 2 3) rBE, and the “B” side needs a base voltage of (VX/R1+VY/R2) rBE. Linearity of better than ± 0.1% is readily achievable with (11) this compensation technique. V V V V V Operational amplifier offsets are another source of error. In I X Y R O , I R = + + + 3 = O R R R R R Figure 4, the input offset voltage and input bias current will 1 1 2 O 2 cause an error in collector current of (VOS/R1) + IB. A low From IO = I1 I2/I3, the output voltage will be: offset op amp, such as the OP07 with less than 75 µV of VOS and I R V B of less than ± 3 nA, is recommended. The OP193, O R2 XVY micropower op amp, should be considered if low power con- VO = 2 V (12) R1 R
OBSOLETE
Figure 5. Four-Quadrant Multiplier –8– REV. E