Datasheet TDC-GPX2 (AustriaMicroSystems)

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TDC-GPX2 4-Channel Time-to-Digital Converter
The GPX2 is a high performance time-to-digital converter (TDC)
General Description
frontend device. Highest measurement performance and highest data throughput is achieved with LVDS stop inputs and LVDS serial outputs for each channel. Current saving operation is also possible with CMOS inputs and SPI readout. High configuration flexibility and unlimited measurement range cover many applications. They range from portable handheld laser range equipment to ambitious time-of-flight measurements of highest performance, as e.g. done in medical imaging applications. GPX2 operates without any locked loop technologies. GPX2 calculates all stop measurements inside, proportional to the applied reference clock. Combinations of best single shot accuracy of 10ps with lowest pulse-to-pulse spacing <5ns and maximum data throughput rate of 70MSPS per stop input are possible.
Figure 1: Time Interval Measurements
#1 REFCLK #2 T-REF STOP T1 T3 T2 Ordering Information and Content Guide appear at end of datasheet.
ams Datasheet Page 1
[v1-03] 2017-Dec-18 Document Feedback Document Outline General Description Key Benefits & Features Applications Block Diagram Pin Assignments Pin Diagram Pin Description Absolute Maximum Ratings Recommended Operation Conditions Converter Characteristics Power Supply Characteristic Reference Clock and Stop Input Requirements LVDS Data Interface Characteristics Serial Communication Interface Typical Operating Characteristics Histograms Integral Non-Linearity Register Description Configuration Register Overview Detailed Configuration Register Description Read Register Overview Detailed Description Time Measurements and Results Measurements of TDC-GPX2 Output Results Calculation of Time Differences Resolution RMS-Resolution Versus Effective Resolution High Resolution Combining Two Stop Channels Channel Combination for Low Pulse-to-Pulse Spacing Channel Combination for Pulse Width Measurement Input Pins for Time Measurement REFCLKP/N: Reference Clock Input REFOSCI/O: Quartz Driver as Reference Clock RSTIDXP/N: Reference Index Counter Reset STOP1…STOP4P/N: Stop Channels DISABLE/N: Stop Disable Input Levels, CMOS or LVDS LVDS Output Interface Digital Output Interface Output Setup and Configuration: LVDS Output Buffers Differential LCLKIN Input LVDS Single Data Read Output Interface (SDR) LVDS Double Data Read Output Interface (DDR) LVDS Output Test Pattern SPI Communication Interface General Detailed Pin Description Communication Commands (Opcodes) Detailed Command Description Initialization Reset Write / Incremental Write Read / Incremental Read Using SPI Interface for Read-Out of Stop Results Coding of Results Configuration of LSB by REFCLK_DIVISIONS Examples for Codes of Time Measurements Results Maximum Time Differences Conversion Latency and Conversion Rate Converter Latency LVDS Synchronization Latency Conversion Rate Peak Conversion Rate Read-Out Rate Average Conversion Rate Examples for Read-Out Rate with LVDS FIFOs for Adapting Peak and Average Conversion Rate Application Information Configuration Examples Typical Configuration for LVDS Example C++ Code Schematic External Components PCB Layout Package Drawings & Markings Mechanical Data QFN64 QFN64 Tray Information QFP64 QFP64 Tape & Reel Information Soldering & Storage Information Ordering & Contact Information RoHS Compliant & ams Green Statement Copyrights & Disclaimer Document Status Revision Information Content Guide