Datasheet TMC4671 (TRINAMIC) - 15

TMC4671 Datasheet • IC Version V1.00 | Document Revision V1.06 • 2019-Feb-06 15 / 159 The ADC engine interfaces the integrated ADC channels and maps raw ADC values to signed 16 bit (s16) values for the inner FOC current control loop based on programmable offset and scaling factors. The FOC torque PI controller forms the inner base component including required transformations (Clark, Park, inverse Park, inverse Clark). All functional blocks are pure hardware.
4.2 Communication Interfaces
The TMC4671 is equipped with an SPI interface for access to all registers of the TMC4671. The SPI interface is the main application interface. An additional UART interface is intended for system setup. With that interface, the user can access all registers of the TMC4671 in parallel to the application accessing them via the SPI communication interface - via the user’s firmware or via evaluation boards and the TMCL-IDE. The data format of the UART interface is similar to the SPI communication interface - SPI 40 bit datagrams sent to the TMC4671 and SPI 40 bit datagrams received by the MCU vs. five bytes sent via UART and five bytes received via UART. Sending a burst of different real-time data for visualization and analysis via the TMCL-IDE can be triggered using special datagrams. With that, the user can set up an embedded application together with the TMCL-IDE, without having to write a complex set of visualization and analysis functions. The user can focus on its application. The TMC4671 is also equipped with an additional SPI master interface (TRINAMIC Real-time Monitoring Interface, DBGSPI) for high-speed visualization of real-time data together with the TMCL-IDE.
4.2.1 SPI Slave User Interface
The SPI of the TMC4671 for the user application has an easy command and control structure. The TMC4671 user SPI acts as a slave. The SPI datagram length is 40 bit with a clock rate up to 1 MHz (8 MHz in future chip version). • The MSB (bit#39) is sent first. The LSB (bit#0) is sent last. • The MSB (bit#39) is the WRITE_notREAD (WRnRD) bit. • The bits (bit#39 to bit#32) are the address bits (ADDR). • Bits (bit#31) to (bit#0) are 32 data bits. The SPI of the TMC4671 immediately responses within the actual SPI datagram on read and write for ease-of-use communication and uses SPI mode 3 with CPOL = 1 and CPHA = 1. Figure 7: SPI Datagram Structure A simple SPI datagram example: 0x8100000000 // 1st write 0x00000000 into address 0x01 (CHIPINFO_ADDR) 0x0000000000 // 2nd read register 0x00 (CHIPINFO_DATA), returns 0x34363731 <=> ACSII "4671" ©2019 TRINAMIC Motion Control GmbH & Co. KG, Hamburg, Germany Terms of delivery and rights to technical change reserved. Download newest version at www.trinamic.com Document Outline 1 Order Codes 2 Functional Summary 3 FOC Basics 3.1 Why FOC? 3.2 What is FOC? 3.3 Why FOC as pure Hardware Solution? 3.4 How does FOC work? 3.5 What is Required for FOC? 3.5.1 Coordinate Transformations - Clarke, Park, iClarke, iPark 3.5.2 Measurement of Stator Coil Currents 3.5.3 Stator Coil Currents I_U, I_V, I_W and Association to Terminal Voltages U_U, U_V, U_W 3.5.4 Measurement of Rotor Angle 3.5.5 Measured Rotor Angle vs. Magnetic Axis of Rotor vs. Magnetic Axis of Stator 3.5.6 Knowledge of Relevant Motor Parameters and Position Sensor (Encoder) Parameters 3.5.7 Proportional Integral (PI) Controllers for Closed Loop Current Control 3.5.8 Pulse Width Modulation (PWM) and Space Vector Pulse Width Modulation (SVPWM) 3.5.9 Orientations, Models of Motors, and Coordinate Transformations 4 Functional Description 4.1 Functional Blocks 4.2 Communication Interfaces 4.2.1 SPI Slave User Interface 4.2.2 TRINAMIC Real-Time Monitoring Interface (SPI Master) 4.2.3 UART Interface 4.2.4 Step/Direction Interface 4.2.5 Single Pin Interface 4.3 Numerical Representation, Electrical Angle, Mechanical Angle, and Pole Pairs 4.3.1 Numerical Representation 4.3.2 N_POLE_PAIRS, PHI_E, PHI_M 4.3.3 Numerical Representation of Angles PHI 4.4 ADC Engine 4.4.1 ADC Group A and ADC Group B 4.4.2 Internal Delta Sigma ADCs 4.4.3 External Delta Sigma ADCs 4.5 Delta Sigma Configuration and Timing Configuration 4.5.1 Internal Delta Sigma Modulators - Mapping of V_RAW to ADC_RAW 4.5.2 External Delta Sigma Modulator Interface 4.5.3 ADC Configuration - MDAC 4.6 Analog Signal Conditioning 4.6.1 FOC3 - Stator Coil Currents I_U, I_V, I_W and Association to Terminal Voltages U_U, U_V, U_W 4.6.2 Stator Coil Currents I_X, I_Y and Association to Terminal Voltages U_X, U_Y 4.6.3 ADC Selector & ADC Scaler w/ Offset Correction 4.7 Encoder Engine 4.7.1 Open-Loop Encoder 4.7.2 Incremental ABN Encoder 4.7.3 Secondary Incremental ABN Encoder 4.7.4 Digital Hall Sensor Interface with optional Interim Position Interpolation 4.7.5 Digital Hall Sensor - Interim Position Interpolation 4.7.6 Digital Hall Sensors - Masking and Filtering 4.7.7 Digital Hall Sensors together with Incremental Encoder 4.7.8 Analog Hall and Analog Encoder Interface (SinCos of 0° 90° or 0° 120° 240°) 4.7.9 Analog Position Decoder (SinCos of 0°90° or 0°120°240°) 4.7.10 Encoder Initialization Support 4.7.11 Velocity Measurement 4.7.12 Reference Switches 4.8 FOC23 Engine 4.8.1 PI Controllers 4.8.2 PI Controller Calculations - Classic Structure 4.8.3 PI Controller Calculations - Advanced Structure 4.8.4 PI Controller - Clipping 4.8.5 PI Flux & PI Torque Controller 4.8.6 PI Velocity Controller 4.8.7 P Position Controller 4.8.8 Inner FOC Control Loop - Flux & Torque 4.8.9 FOC Transformations and PI(D) for control of Flux & Torque 4.8.10 Motion Modes 4.8.11 Brake Chopper 4.9 Filtering and Feed-Forward Control 4.9.1 Biquad Filters 4.9.2 Standard Velocity Filter 4.9.3 Feed-Forward Control Structure 4.10 PWM Engine 4.10.1 PWM Polarities 4.10.2 PWM Frequency 4.10.3 PWM Resolution 4.10.4 PWM Modes 4.10.5 Break-Before-Make (BBM) 4.10.6 Space Vector PWM (SVPWM) 5 Safety Functions 5.1 Watchdog 6 Register Map 6.1 Register Map Overview 6.2 Register Map Full 7 Pinning 8 TMC4671 Pin Table 9 Electrical Characteristics 9.1 Absolute Maximum Ratings 9.2 Electrical Characteristics 9.2.1 Operational Range 9.2.2 DC Characteristics 10 Sample Circuits 10.1 Supply Pins 10.2 Clock and Reset Circuitry 10.3 Digital Encoder, Hall Sensor Interface and Reference Switches 10.4 Analog Frontend 10.5 Phase Current Measurement 10.6 Power Stage Interface 11 Setup Guidelines 12 Package Dimensions 13 Supplemental Directives 13.1 Producer Information 13.2 Copyright 13.3 Trademark Designations and Symbols 13.4 Target User 13.5 Disclaimer: Life Support Systems 13.6 Disclaimer: Intended Use 13.7 Collateral Documents & Tools 14 Errata 15 Figures Index 16 Tables Index 17 Revision History 17.1 IC Revision 17.2 Document Revision