Datasheet S-35720 (ABLIC) - 14

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC S-35720 Series
Rev.1.0_00
Configuration of Crystal Oscillation Circuit
Since the S-35720 Series has built-in capacitors (Cg and Cd), adjustment of oscillation frequency is unnecessary. However, the crystal oscillation circuit is sensitive to external noise and parasitic capacitance (CP), these effects may become a factor to worsen the clock accuracy. Therefore, the following steps are recommended for optimizing the configuration of crystal oscillation circuit. • Locate the bypass capacitor adjacent to the power supply pin of the S-35720 Series. • Place the S-35720 Series and the quartz crystal as close to each other as possible, and shorten the wiring. • Increase the insulation resistance between pins and the board wiring patterns of XIN and XOUT. • Do not place any signal or power lines close to the crystal oscillation circuit. • Locate the GND layer immediately below the crystal oscillation circuit. (In the case of a multi-layer board, only the layer farthest from the crystal oscillation circuit should be located as the GND layer. Do not locate a circuit pattern on the intermediate layers.) S-35720 Quartz crystal: 32.768 kHz CL = 6.0 pF XIN Cg Rf Cd Parasitic XOUT Rd capacitance (CP) Rf = 100 MΩ Rd = 100 kΩ
Figure 14 Configuration of Crystal Oscillation Circuit
Locate the GND layer in the layer immediately below (In the case of a multi-layer board, only the layer farthest from the oscillation circuit should be located as the GND layer. Do not locate a circuit pattern on the intermediate layers.) XOUT XIN VSS S-35720 Top view Quartz crystal Shield the perimeter with GND
Figure 15 Example of Recommended Connection Pattern Diagram Caution Oscillation characteristics are subject to the variation of each component such as board parasitic capacitance, parasitic resistance, quartz crystal, and external capacitor. When configuring crystal oscillation circuit, pay sufficient attention for them.
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