Datasheet A80603, A80603-1 (Allegro) - 5

FabricanteAllegro
DescripciónLED Driver with Pre-Emptive Boost for Ultra-High Dimming Ratio and Low Output Ripple
Páginas / Página30 / 5 — A80603 and. LED Driver with Pre-Emptive Boost. A80603-1 for Ultra-High …
Formato / tamaño de archivoPDF / 4.6 Mb
Idioma del documentoInglés

A80603 and. LED Driver with Pre-Emptive Boost. A80603-1 for Ultra-High Dimming Ratio and Low Output Ripple

A80603 and LED Driver with Pre-Emptive Boost A80603-1 for Ultra-High Dimming Ratio and Low Output Ripple

Línea de modelo para esta hoja de datos

Versión de texto del documento

A80603 and LED Driver with Pre-Emptive Boost A80603-1 for Ultra-High Dimming Ratio and Low Output Ripple PINOUT DIAGRAM AND TERMINAL LIST ESN E E T P NI S A W W V V V G S S O 4 3 2 1 0 9 2 2 2 2 2 1 FAULT 1 18 PGND CLKOUT 2 17 PGND VDD 3 16 LED4 PAD AGND 4 15 LED3 COMP 5 14 LED2 ISET 6 13 LED1 7 8 9 01 11 21 B T E HT E M M N P I E D S W W F P P A Package ES, 24-Pin QFN Pinouts Terminal List Table Number Name Function
1 FAULT The pin is an open-drain type configuration that will be pulled low when a fault occurs. Connect a 10 kΩ resistor between this pin and desired logic level voltage. 2 CLKOUT Logic output representing the switching frequency of internal boost oscillator. This allows other converters to be synchronized to the same fSW with the same dithering modulation, if applicable. Output is active as long as EN = H. 3 VDD Output of internal LDO (bias regulator). Connect a 1 µF decoupling capacitor between this pin and GND. 4 AGND LED current ground. Also serves as ‘quiet’ ground for analog signals. 5 COMP Output of the error amplifier and compensation node. Connect a series RZ-CZ network from this pin to GND for control loop compensation. 6 ISET Connect RISET resistor between this pin and GND to set the 100% LED current. 7 PEB Connect resistor to GND to adjust delay time (~2 to 9 µs) for Pre-Emptive Boost. Leave pin open for minimum PEB delay of 1 µs. 8 DITH Dithering control: connect a capacitor to GND to set the dithering modulation frequency (typically 1 to 3 kHz). Connect a resistor between DITH and FSET pins to set the dithering range (such as ±5% of fSW). Frequency/synchronization pin. A resistor RFSET from this pin to GND sets the switching frequency fSW (with dithering super-imposed) 9 FSET/SYNC between 200 kHz and 2.3 MHz. It can also be used to synchronize fSW to an external frequency between 260 kHz and 2.3 MHz (dithering is disabled in this case). 10 APWM Analog dimming. Apply APWM clock (40 kHz to 1 MHz) to this pin and the duty cycle of this clock determines the LED current. Leave open or connect to GND for 100%. 11 PWM Controls the on/off state of LED current sinks to reduce the light intensity by using pulse-width modulation. Typical PWM dimming frequency is in the range of 200 Hz to 2 kHz. EN and PWM pins may be tied together to allow single-wire dimming control. 12 EN Enables the IC when this pin is pulled high. If EN goes low, the IC remains in standby mode for up to 16 ms, then shuts down completely. 13-16 LED1-4 LED current sinks #1 to 4. Connect the cathode of each LED string to pin. Unused LED pin must be terminated to GND through a 6.19 kΩ resistor. 17-18 PGND Power ground for internal NMOS switching device. 19 OVP Overvoltage protection. Connect external resistor from VOUT to this pin to adjust the over voltage protection level. 20-21 SW The drain of the internal NMOS switching device of the boost converter. 22 GATE Output gate driver pin for external P-channel FET control. 23 VSENSE Connect this pin to the negative sense side of the current sense resistor RSC. The threshold voltage is measured as VIN – VSENSE. There is also a fixed ~20 µA current sink to allow for trip threshold adjustment. 24 VIN Input power to the IC as well as the positive input used for current sense resistor. – PAD Exposed pad of the package providing enhanced thermal dissipation. Must be connected to the ground plane(s) of the PCB with at least 8 vias, directly in the pad. Allegro MicroSystems, LLC 5 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Applications Package Selection Guide Absolute Maximum Ratings Thermal Characteristics Typical Application – SEPIC Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics Functional Description Enabling the IC Powering Up: LED Detection Phase Powering Up: Boost Output Undervoltage Soft Start Function Frequency Selection Synchronization Loss of External Sync Signal Switching Frequency Dithering Clock Out Function LED Current Setting PWM Dimming Pre-Emptive Boost (PEB) Analog Dimming with APWM Pin Extending LED Dimming Ratio Analog Dimming with External Voltage VDD Shutdown Fault Detection and Protection LED String Partial-Short Detect Overvoltage Protection Boost Switch Overcurrent Protection Input Overcurrent Protection and Disconnect Switch Setting the Current Sense Resistor Input UVLO Fault Protection During Operation Fault Recovery Mechanism Package Outline Drawing