Datasheet ADN2805 (Analog Devices) - 5

FabricanteAnalog Devices
Descripción1.25 Gbps Clock and Data Recovery IC
Páginas / Página16 / 5 — Data Sheet. ADN2805. Timing Characteristics. CLKOUTP. DATAOUTP/. …
RevisiónB
Formato / tamaño de archivoPDF / 293 Kb
Idioma del documentoInglés

Data Sheet. ADN2805. Timing Characteristics. CLKOUTP. DATAOUTP/. DATAOUTN. DIFFERENTIAL CLKOUTP/N, DATAOUTP/N. VOH. VOS. |VOD|. 5mA. RLOAD

Data Sheet ADN2805 Timing Characteristics CLKOUTP DATAOUTP/ DATAOUTN DIFFERENTIAL CLKOUTP/N, DATAOUTP/N VOH VOS |VOD| 5mA RLOAD

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Data Sheet ADN2805 Timing Characteristics CLKOUTP T T H S DATAOUTP/
2 00
DATAOUTN
1- 712 0 Figure 2. Output Timing
DIFFERENTIAL CLKOUTP/N, DATAOUTP/N VOH VOS |VOD|
3 00
V
21-
OL
71 0 Figure 3. Differential Output Specifications
5mA RLOAD V 100Ω DIFF 100Ω 5mA
04
SIMPLIFIED LVDS
0 1-
OUTPUT STAGE
12 07 Figure 4. Differential Output Stage Rev. B | Page 5 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS JITTER SPECIFICATIONS OUTPUT AND TIMING SPECIFICATIONS Timing Characteristics ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS Thermal Resistance ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS I2C INTERFACE TIMING AND INTERNAL REGISTER DESCRIPTION THEORY OF OPERATION FUNCTIONAL DESCRIPTION FREQUENCY ACQUISITION INPUT BUFFER LOCK DETECTOR OPERATION Normal Mode LOL Detector Operation Using a Reference Clock Static LOL Mode SQUELCH MODE SYSTEM RESET I2C INTERFACE APPLICATIONS INFORMATION PCB DESIGN GUIDELINES Power Supply Connections and Ground Planes Transmission Lines Soldering Guidelines for Lead Frame Chip Scale Package OUTLINE DIMENSIONS ORDERING GUIDE